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| author |   Umesh Nerlige Ramappa <umesh.nerlige.ramappa@intel.com> | 2020-01-23 17:37:01 -0800 |
|---|---|---|
| committer |   Chris Wilson <chris@chris-wilson.co.uk> | 2020-01-27 21:11:59 +0000 |
| commit | 6f280b133dc2468d86ecb5c3c7c5dbc4f23e49fc (patch) | |
| tree | 5d6b9bdde6ffb7e23761280ef3639fd801115a87 /drivers/gpu/drm/i915/gt/intel_lrc.c | |
| parent | drm/i915/gt: Acquire ce->active before ce->pin_count/ce->pin_mutex (diff) | |
| download | wireguard-linux-6f280b133dc2468d86ecb5c3c7c5dbc4f23e49fc.tar.xz wireguard-linux-6f280b133dc2468d86ecb5c3c7c5dbc4f23e49fc.zip | |
drm/i915/perf: Fix OA context id overlap with idle context id
Engine context pinned in perf OA was set to same context id as
the idle context. Set the context id to an unused value.
Clear the sw context id field in lrc descriptor before ORing with
ce->tag (Chris)
Closes: https://gitlab.freedesktop.org/drm/intel/issues/756
Signed-off-by: Umesh Nerlige Ramappa <umesh.nerlige.ramappa@intel.com>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Link: https://patchwork.freedesktop.org/patch/msgid/20200124013701.40609-1-umesh.nerlige.ramappa@intel.com
Diffstat (limited to 'drivers/gpu/drm/i915/gt/intel_lrc.c')
| -rw-r--r-- | drivers/gpu/drm/i915/gt/intel_lrc.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/gpu/drm/i915/gt/intel_lrc.c b/drivers/gpu/drm/i915/gt/intel_lrc.c index 3d1b990b556d..f1ea2138cbba 100644 --- a/drivers/gpu/drm/i915/gt/intel_lrc.c +++ b/drivers/gpu/drm/i915/gt/intel_lrc.c @@ -1211,12 +1211,12 @@ __execlists_schedule_in(struct i915_request *rq) if (IS_ENABLED(CONFIG_DRM_I915_DEBUG_GEM)) execlists_check_context(ce, engine); + ce->lrc_desc &= ~GENMASK_ULL(47, 37); if (ce->tag) { /* Use a fixed tag for OA and friends */ ce->lrc_desc |= (u64)ce->tag << 32; } else { /* We don't need a strict matching tag, just different values */ - ce->lrc_desc &= ~GENMASK_ULL(47, 37); ce->lrc_desc |= (u64)(++engine->context_tag % NUM_CONTEXT_TAG) << GEN11_SW_CTX_ID_SHIFT; |