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| author |   Chris Wilson <chris@chris-wilson.co.uk> | 2019-11-02 12:57:39 +0000 |
|---|---|---|
| committer | Chris Wilson <chris@chris-wilson.co.uk> | 2019-11-02 13:39:13 +0000 |
| commit | b0b10248866455a19b4dd4ac186eb131d83df452 (patch) | |
| tree | 90cdaeb5b4874b50cd8d8f1b1cbb11ca9612cf8a /drivers/gpu/drm/i915/gt/intel_lrc_reg.h | |
| parent | drm/i915/selftests: Flush all active callbacks (diff) | |
| download | wireguard-linux-b0b10248866455a19b4dd4ac186eb131d83df452.tar.xz wireguard-linux-b0b10248866455a19b4dd4ac186eb131d83df452.zip | |
drm/i915/execlists: Verify context register state before execution
Check that the context's ring register state still matches our
expectations prior to execution.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Mika Kuoppala <mika.kuoppala@linux.intel.com>
Reviewed-by: Mika Kuoppala <mika.kuoppala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20191102125739.24626-1-chris@chris-wilson.co.uk
Diffstat (limited to 'drivers/gpu/drm/i915/gt/intel_lrc_reg.h')
| -rw-r--r-- | drivers/gpu/drm/i915/gt/intel_lrc_reg.h | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/drivers/gpu/drm/i915/gt/intel_lrc_reg.h b/drivers/gpu/drm/i915/gt/intel_lrc_reg.h index 06ab0276e10e..08a3be65f700 100644 --- a/drivers/gpu/drm/i915/gt/intel_lrc_reg.h +++ b/drivers/gpu/drm/i915/gt/intel_lrc_reg.h @@ -13,8 +13,8 @@ #define CTX_CONTEXT_CONTROL (0x02 + 1) #define CTX_RING_HEAD (0x04 + 1) #define CTX_RING_TAIL (0x06 + 1) -#define CTX_RING_BUFFER_START (0x08 + 1) -#define CTX_RING_BUFFER_CONTROL (0x0a + 1) +#define CTX_RING_START (0x08 + 1) +#define CTX_RING_CTL (0x0a + 1) #define CTX_BB_STATE (0x10 + 1) #define CTX_BB_PER_CTX_PTR (0x18 + 1) #define CTX_PDP3_UDW (0x24 + 1) |