diff options
| author |   Tvrtko Ursulin <tvrtko.ursulin@intel.com> | 2019-06-21 08:08:02 +0100 |
|---|---|---|
| committer | Tvrtko Ursulin <tvrtko.ursulin@intel.com> | 2019-06-21 13:48:40 +0100 |
| commit | baea429dc5ed90cf9afbdf326fa527581745c8f1 (patch) | |
| tree | 4e5ad9378cc0225a67203f0aaafab80b84a3822e /drivers/gpu/drm/i915/gt/selftest_hangcheck.c | |
| parent | drm/i915: Convert i915_gem_flush_ggtt_writes to intel_gt (diff) | |
| download | wireguard-linux-baea429dc5ed90cf9afbdf326fa527581745c8f1.tar.xz wireguard-linux-baea429dc5ed90cf9afbdf326fa527581745c8f1.zip | |
drm/i915: Move i915_gem_chipset_flush to intel_gt
This aligns better with the rest of restructuring.
v2:
* Move call out of line. (Chris)
Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Suggested-by: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Link: https://patchwork.freedesktop.org/patch/msgid/20190621070811.7006-24-tvrtko.ursulin@linux.intel.com
Diffstat (limited to 'drivers/gpu/drm/i915/gt/selftest_hangcheck.c')
| -rw-r--r-- | drivers/gpu/drm/i915/gt/selftest_hangcheck.c | 14 |
1 files changed, 10 insertions, 4 deletions
diff --git a/drivers/gpu/drm/i915/gt/selftest_hangcheck.c b/drivers/gpu/drm/i915/gt/selftest_hangcheck.c index 1ee4c923044f..2d773f11e203 100644 --- a/drivers/gpu/drm/i915/gt/selftest_hangcheck.c +++ b/drivers/gpu/drm/i915/gt/selftest_hangcheck.c @@ -25,6 +25,7 @@ #include <linux/kthread.h> #include "gem/i915_gem_context.h" +#include "gt/intel_gt.h" #include "intel_engine_pm.h" #include "i915_selftest.h" @@ -43,6 +44,7 @@ struct hang { struct drm_i915_private *i915; + struct intel_gt *gt; struct drm_i915_gem_object *hws; struct drm_i915_gem_object *obj; struct i915_gem_context *ctx; @@ -135,6 +137,8 @@ hang_create_request(struct hang *h, struct intel_engine_cs *engine) u32 *batch; int err; + h->gt = engine->gt; + if (i915_gem_object_is_active(h->obj)) { struct drm_i915_gem_object *obj; void *vaddr; @@ -242,7 +246,7 @@ hang_create_request(struct hang *h, struct intel_engine_cs *engine) *batch++ = lower_32_bits(vma->node.start); } *batch++ = MI_BATCH_BUFFER_END; /* not reached */ - i915_gem_chipset_flush(h->i915); + intel_gt_chipset_flush(engine->gt); if (rq->engine->emit_init_breadcrumb) { err = rq->engine->emit_init_breadcrumb(rq); @@ -276,7 +280,9 @@ static u32 hws_seqno(const struct hang *h, const struct i915_request *rq) static void hang_fini(struct hang *h) { *h->batch = MI_BATCH_BUFFER_END; - i915_gem_chipset_flush(h->i915); + + if (h->gt) + intel_gt_chipset_flush(h->gt); i915_gem_object_unpin_map(h->obj); i915_gem_object_put(h->obj); @@ -333,7 +339,7 @@ static int igt_hang_sanitycheck(void *arg) i915_request_get(rq); *h.batch = MI_BATCH_BUFFER_END; - i915_gem_chipset_flush(i915); + intel_gt_chipset_flush(engine->gt); i915_request_add(rq); @@ -1509,7 +1515,7 @@ static int igt_reset_queue(void *arg) pr_info("%s: Completed %d resets\n", engine->name, count); *h.batch = MI_BATCH_BUFFER_END; - i915_gem_chipset_flush(i915); + intel_gt_chipset_flush(engine->gt); i915_request_put(prev); |