diff options
| author |   Jouni Högander <jouni.hogander@intel.com> | 2023-12-18 19:50:01 +0200 |
|---|---|---|
| committer | Jouni Högander <jouni.hogander@intel.com> | 2024-01-09 15:39:58 +0200 |
| commit | 7f85883e4a7b95559fb61cd202196ac8c8f857d7 (patch) | |
| tree | da4c94e98d362e973827377b0861ff0e7be50444 /drivers/gpu/drm/i915/i915_reg.h | |
| parent | drm/i915/psr: Carry su area in crtc_state (diff) | |
| download | wireguard-linux-7f85883e4a7b95559fb61cd202196ac8c8f857d7.tar.xz wireguard-linux-7f85883e4a7b95559fb61cd202196ac8c8f857d7.zip | |
drm/i915/psr: Calculate and configure CUR_POS_ERLY_TPT
New register CUR_POS_ERLY_TPT related to early transport is
supposed to be configured when early transport is in use.
This register is used to configure cursor vertical postion
from beginning of selective update area.
Bspec: 68927
Signed-off-by: Jouni Högander <jouni.hogander@intel.com>
Reviewed-by: Mika Kahola <mika.kahola@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20231218175004.52875-5-jouni.hogander@intel.com
Diffstat (limited to 'drivers/gpu/drm/i915/i915_reg.h')
| -rw-r--r-- | drivers/gpu/drm/i915/i915_reg.h | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h index 220fcd9f8f1d..75bc08081fce 100644 --- a/drivers/gpu/drm/i915/i915_reg.h +++ b/drivers/gpu/drm/i915/i915_reg.h @@ -3059,6 +3059,7 @@ #define MCURSOR_MODE_64_ARGB_AX (0x20 | MCURSOR_MODE_64_32B_AX) #define _CURABASE 0x70084 #define _CURAPOS 0x70088 +#define _CURAPOS_ERLY_TPT 0x7008c #define CURSOR_POS_Y_SIGN REG_BIT(31) #define CURSOR_POS_Y_MASK REG_GENMASK(30, 16) #define CURSOR_POS_Y(y) REG_FIELD_PREP(CURSOR_POS_Y_MASK, (y)) @@ -3087,6 +3088,7 @@ #define CURCNTR(pipe) _MMIO_CURSOR2(pipe, _CURACNTR) #define CURBASE(pipe) _MMIO_CURSOR2(pipe, _CURABASE) #define CURPOS(pipe) _MMIO_CURSOR2(pipe, _CURAPOS) +#define CURPOS_ERLY_TPT(pipe) _MMIO_CURSOR2(pipe, _CURAPOS_ERLY_TPT) #define CURSIZE(pipe) _MMIO_CURSOR2(pipe, _CURASIZE) #define CUR_FBC_CTL(pipe) _MMIO_CURSOR2(pipe, _CUR_FBC_CTL_A) #define CUR_CHICKEN(pipe) _MMIO_CURSOR2(pipe, _CUR_CHICKEN_A) |