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| author |   Chris Wilson <chris@chris-wilson.co.uk> | 2020-02-16 16:34:45 +0000 |
|---|---|---|
| committer | Chris Wilson <chris@chris-wilson.co.uk> | 2020-02-19 14:09:18 +0000 |
| commit | b04002f4dbee039feaf9ef814ba08c24a588e146 (patch) | |
| tree | 3b65ee770c58b8bfc7ad572dc8af8ed3c8748bdf /drivers/gpu/drm/i915/intel_device_info.c | |
| parent | drm/i915/gt: Refactor l3cc/mocs availability (diff) | |
| download | wireguard-linux-b04002f4dbee039feaf9ef814ba08c24a588e146.tar.xz wireguard-linux-b04002f4dbee039feaf9ef814ba08c24a588e146.zip | |
drm/i915: Read rawclk_freq earlier
Read the rawclk_freq during runtime info probing, prior to its first use
in computing the CS timestamp frequency. Then store it in the runtime
info, and include it in the debug printouts.
Closes: https://gitlab.freedesktop.org/drm/intel/issues/834
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20200216163445.555786-1-chris@chris-wilson.co.uk
Diffstat (limited to 'drivers/gpu/drm/i915/intel_device_info.c')
| -rw-r--r-- | drivers/gpu/drm/i915/intel_device_info.c | 7 |
1 files changed, 6 insertions, 1 deletions
diff --git a/drivers/gpu/drm/i915/intel_device_info.c b/drivers/gpu/drm/i915/intel_device_info.c index 18d9de488593..8e99ad097830 100644 --- a/drivers/gpu/drm/i915/intel_device_info.c +++ b/drivers/gpu/drm/i915/intel_device_info.c @@ -24,6 +24,7 @@ #include <drm/drm_print.h> +#include "display/intel_cdclk.h" #include "intel_device_info.h" #include "i915_drv.h" @@ -132,6 +133,7 @@ void intel_device_info_print_runtime(const struct intel_runtime_info *info, { sseu_dump(&info->sseu, p); + drm_printf(p, "rawclk rate: %u kHz\n", info->rawclk_freq); drm_printf(p, "CS timestamp frequency: %u kHz\n", info->cs_timestamp_frequency_khz); } @@ -743,7 +745,7 @@ static u32 read_timestamp_frequency(struct drm_i915_private *dev_priv) * hclks." (through the “Clocking Configuration” * (“CLKCFG”) MCHBAR register) */ - return dev_priv->rawclk_freq / 16; + return RUNTIME_INFO(dev_priv)->rawclk_freq / 16; } else if (INTEL_GEN(dev_priv) <= 8) { /* PRMs say: * @@ -1043,6 +1045,9 @@ void intel_device_info_runtime_init(struct drm_i915_private *dev_priv) info->ppgtt_type = INTEL_PPGTT_NONE; } + runtime->rawclk_freq = intel_read_rawclk(dev_priv); + drm_dbg(&dev_priv->drm, "rawclk rate: %d kHz\n", runtime->rawclk_freq); + /* Initialize command stream timestamp frequency */ runtime->cs_timestamp_frequency_khz = read_timestamp_frequency(dev_priv); |