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| author |   arun.siluvery@linux.intel.com <arun.siluvery@linux.intel.com> | 2016-06-03 11:16:10 +0100 |
|---|---|---|
| committer |   Tvrtko Ursulin <tvrtko.ursulin@intel.com> | 2016-06-14 10:44:07 +0100 |
| commit | 780f0aebda2e2f9df4cc5ddda411a724db7a1dcc (patch) | |
| tree | 9f6f0fabe036d540ea26ace20724599fbfd5a73b /drivers/gpu/drm/i915/intel_ringbuffer.c | |
| parent | drm/i915/bxt: Add WaEnablePooledEuFor2x6 (diff) | |
| download | wireguard-linux-780f0aebda2e2f9df4cc5ddda411a724db7a1dcc.tar.xz wireguard-linux-780f0aebda2e2f9df4cc5ddda411a724db7a1dcc.zip | |
drm/i915/bxt: Add WaDisablePooledEuLoadBalancingFix
This is a WA affecting pooled eu which is a bxt specific feature.
Reviewed-by: Mika Kuoppala <mika.kuoppala@intel.com>
Cc: Winiarski, Michal <michal.winiarski@intel.com>
Cc: Zou, Nanhai <nanhai.zou@intel.com>
Cc: Yang, Rong R <rong.r.yang@intel.com>
Cc: Jeff McGee <jeff.mcgee@intel.com>
Signed-off-by: Arun Siluvery <arun.siluvery@linux.intel.com>
Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Diffstat (limited to 'drivers/gpu/drm/i915/intel_ringbuffer.c')
| -rw-r--r-- | drivers/gpu/drm/i915/intel_ringbuffer.c | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c b/drivers/gpu/drm/i915/intel_ringbuffer.c index 110c7fc957b7..fedd27049814 100644 --- a/drivers/gpu/drm/i915/intel_ringbuffer.c +++ b/drivers/gpu/drm/i915/intel_ringbuffer.c @@ -1160,6 +1160,12 @@ static int bxt_init_workarounds(struct intel_engine_cs *engine) WA_SET_BIT_MASKED(GEN8_ROW_CHICKEN, STALL_DOP_GATING_DISABLE); + /* WaDisablePooledEuLoadBalancingFix:bxt */ + if (IS_BXT_REVID(dev_priv, BXT_REVID_B0, REVID_FOREVER)) { + WA_SET_BIT_MASKED(FF_SLICE_CS_CHICKEN2, + GEN9_POOLED_EU_LOAD_BALANCING_FIX_DISABLE); + } + /* WaDisableSbeCacheDispatchPortSharing:bxt */ if (IS_BXT_REVID(dev_priv, 0, BXT_REVID_B0)) { WA_SET_BIT_MASKED( |