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authorTim Gore <tim.gore@intel.com>2016-04-19 15:45:52 +0100
committerTvrtko Ursulin <tvrtko.ursulin@intel.com>2016-04-20 09:58:19 +0100
commitbfd8ad4e4a180b95d500c76280ddc01f23f92b9d (patch)
treecc5ab77b74c4980d92f44f7a4452ca1bd32d96b3 /drivers/gpu/drm/i915/intel_ringbuffer.c
parentdrm/i915: Fixing eDP detection on certain platforms (diff)
downloadwireguard-linux-bfd8ad4e4a180b95d500c76280ddc01f23f92b9d.tar.xz
wireguard-linux-bfd8ad4e4a180b95d500c76280ddc01f23f92b9d.zip
drm/i915/gen9: implement WaEnableSamplerGPGPUPreemptionSupport
WaEnableSamplerGPGPUPreemptionSupport fixes a problem related to mid thread pre-emption. Signed-off-by: Tim Gore <tim.gore@intel.com> Reviewed-by: Dave Gordon <david.s.gordon@intel.com> Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com> Link: http://patchwork.freedesktop.org/patch/msgid/1461077152-31899-1-git-send-email-tim.gore@intel.com
Diffstat (limited to 'drivers/gpu/drm/i915/intel_ringbuffer.c')
-rw-r--r--drivers/gpu/drm/i915/intel_ringbuffer.c7
1 files changed, 4 insertions, 3 deletions
diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c b/drivers/gpu/drm/i915/intel_ringbuffer.c
index 0d24494904ef..444d30adf60d 100644
--- a/drivers/gpu/drm/i915/intel_ringbuffer.c
+++ b/drivers/gpu/drm/i915/intel_ringbuffer.c
@@ -959,9 +959,10 @@ static int gen9_init_workarounds(struct intel_engine_cs *engine)
}
/* WaEnableYV12BugFixInHalfSliceChicken7:skl,bxt */
- if (IS_SKL_REVID(dev, SKL_REVID_C0, REVID_FOREVER) || IS_BROXTON(dev))
- WA_SET_BIT_MASKED(GEN9_HALF_SLICE_CHICKEN7,
- GEN9_ENABLE_YV12_BUGFIX);
+ /* WaEnableSamplerGPGPUPreemptionSupport:skl,bxt */
+ WA_SET_BIT_MASKED(GEN9_HALF_SLICE_CHICKEN7,
+ GEN9_ENABLE_YV12_BUGFIX |
+ GEN9_ENABLE_GPGPU_PREEMPTION);
/* Wa4x4STCOptimizationDisable:skl,bxt */
/* WaDisablePartialResolveInVc:skl,bxt */