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authorMaarten Lankhorst <maarten.lankhorst@linux.intel.com>2020-08-25 11:00:02 +0200
committerMaarten Lankhorst <maarten.lankhorst@linux.intel.com>2020-08-25 11:00:02 +0200
commit2d9ad4cfaf4d32a64a4ed556e5bcab9121215026 (patch)
tree3572e6cd05effa4e2943cee817defb2b9a72afd1 /drivers/gpu/drm/nouveau/include/nvif
parentdrm/modeset-lock: Take the modeset BKL for legacy drivers (diff)
parentLinux 5.9-rc2 (diff)
downloadwireguard-linux-2d9ad4cfaf4d32a64a4ed556e5bcab9121215026.tar.xz
wireguard-linux-2d9ad4cfaf4d32a64a4ed556e5bcab9121215026.zip
Merge tag 'v5.9-rc2' into drm-misc-fixes
Backmerge requested by Tomi for a fix to omap inconsistent locking state issue, and because we need at least v5.9-rc2 now. Signed-off-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Diffstat (limited to 'drivers/gpu/drm/nouveau/include/nvif')
-rw-r--r--drivers/gpu/drm/nouveau/include/nvif/client.h4
-rw-r--r--drivers/gpu/drm/nouveau/include/nvif/device.h6
-rw-r--r--drivers/gpu/drm/nouveau/include/nvif/disp.h3
-rw-r--r--drivers/gpu/drm/nouveau/include/nvif/mem.h14
-rw-r--r--drivers/gpu/drm/nouveau/include/nvif/mmu.h5
-rw-r--r--drivers/gpu/drm/nouveau/include/nvif/notify.h9
-rw-r--r--drivers/gpu/drm/nouveau/include/nvif/object.h22
-rw-r--r--drivers/gpu/drm/nouveau/include/nvif/parent.h25
-rw-r--r--drivers/gpu/drm/nouveau/include/nvif/printf.h20
-rw-r--r--drivers/gpu/drm/nouveau/include/nvif/push.h359
-rw-r--r--drivers/gpu/drm/nouveau/include/nvif/push006c.h73
-rw-r--r--drivers/gpu/drm/nouveau/include/nvif/push206e.h13
-rw-r--r--drivers/gpu/drm/nouveau/include/nvif/push507c.h25
-rw-r--r--drivers/gpu/drm/nouveau/include/nvif/push906f.h48
-rw-r--r--drivers/gpu/drm/nouveau/include/nvif/pushc37b.h18
-rw-r--r--drivers/gpu/drm/nouveau/include/nvif/user.h4
-rw-r--r--drivers/gpu/drm/nouveau/include/nvif/vmm.h6
17 files changed, 627 insertions, 27 deletions
diff --git a/drivers/gpu/drm/nouveau/include/nvif/client.h b/drivers/gpu/drm/nouveau/include/nvif/client.h
index e63c6c965b54..347d2c020bd1 100644
--- a/drivers/gpu/drm/nouveau/include/nvif/client.h
+++ b/drivers/gpu/drm/nouveau/include/nvif/client.h
@@ -12,9 +12,9 @@ struct nvif_client {
bool super;
};
-int nvif_client_init(struct nvif_client *parent, const char *name, u64 device,
+int nvif_client_ctor(struct nvif_client *parent, const char *name, u64 device,
struct nvif_client *);
-void nvif_client_fini(struct nvif_client *);
+void nvif_client_dtor(struct nvif_client *);
int nvif_client_ioctl(struct nvif_client *, void *, u32);
int nvif_client_suspend(struct nvif_client *);
int nvif_client_resume(struct nvif_client *);
diff --git a/drivers/gpu/drm/nouveau/include/nvif/device.h b/drivers/gpu/drm/nouveau/include/nvif/device.h
index c2a572c67a76..b0e59800a320 100644
--- a/drivers/gpu/drm/nouveau/include/nvif/device.h
+++ b/drivers/gpu/drm/nouveau/include/nvif/device.h
@@ -18,9 +18,9 @@ struct nvif_device {
struct nvif_user user;
};
-int nvif_device_init(struct nvif_object *, u32 handle, s32 oclass, void *, u32,
- struct nvif_device *);
-void nvif_device_fini(struct nvif_device *);
+int nvif_device_ctor(struct nvif_object *, const char *name, u32 handle,
+ s32 oclass, void *, u32, struct nvif_device *);
+void nvif_device_dtor(struct nvif_device *);
u64 nvif_device_time(struct nvif_device *);
/*XXX*/
diff --git a/drivers/gpu/drm/nouveau/include/nvif/disp.h b/drivers/gpu/drm/nouveau/include/nvif/disp.h
index 7c0eda375c01..07ac544f282f 100644
--- a/drivers/gpu/drm/nouveau/include/nvif/disp.h
+++ b/drivers/gpu/drm/nouveau/include/nvif/disp.h
@@ -7,6 +7,7 @@ struct nvif_disp {
struct nvif_object object;
};
-int nvif_disp_ctor(struct nvif_device *, s32 oclass, struct nvif_disp *);
+int nvif_disp_ctor(struct nvif_device *, const char *name, s32 oclass,
+ struct nvif_disp *);
void nvif_disp_dtor(struct nvif_disp *);
#endif
diff --git a/drivers/gpu/drm/nouveau/include/nvif/mem.h b/drivers/gpu/drm/nouveau/include/nvif/mem.h
index 80ee4ab0f016..9e1071dd56a0 100644
--- a/drivers/gpu/drm/nouveau/include/nvif/mem.h
+++ b/drivers/gpu/drm/nouveau/include/nvif/mem.h
@@ -10,11 +10,13 @@ struct nvif_mem {
u64 size;
};
-int nvif_mem_init_type(struct nvif_mmu *mmu, s32 oclass, int type, u8 page,
- u64 size, void *argv, u32 argc, struct nvif_mem *);
-int nvif_mem_init(struct nvif_mmu *mmu, s32 oclass, u8 type, u8 page,
- u64 size, void *argv, u32 argc, struct nvif_mem *);
-void nvif_mem_fini(struct nvif_mem *);
+int nvif_mem_ctor_type(struct nvif_mmu *mmu, const char *name, s32 oclass,
+ int type, u8 page, u64 size, void *argv, u32 argc,
+ struct nvif_mem *);
+int nvif_mem_ctor(struct nvif_mmu *mmu, const char *name, s32 oclass, u8 type,
+ u8 page, u64 size, void *argv, u32 argc, struct nvif_mem *);
+void nvif_mem_dtor(struct nvif_mem *);
-int nvif_mem_init_map(struct nvif_mmu *, u8 type, u64 size, struct nvif_mem *);
+int nvif_mem_ctor_map(struct nvif_mmu *, const char *name, u8 type, u64 size,
+ struct nvif_mem *);
#endif
diff --git a/drivers/gpu/drm/nouveau/include/nvif/mmu.h b/drivers/gpu/drm/nouveau/include/nvif/mmu.h
index cec1e88a0a05..2035ef1d35f5 100644
--- a/drivers/gpu/drm/nouveau/include/nvif/mmu.h
+++ b/drivers/gpu/drm/nouveau/include/nvif/mmu.h
@@ -31,8 +31,9 @@ struct nvif_mmu {
u8 *kind;
};
-int nvif_mmu_init(struct nvif_object *, s32 oclass, struct nvif_mmu *);
-void nvif_mmu_fini(struct nvif_mmu *);
+int nvif_mmu_ctor(struct nvif_object *, const char *name, s32 oclass,
+ struct nvif_mmu *);
+void nvif_mmu_dtor(struct nvif_mmu *);
static inline bool
nvif_mmu_kind_valid(struct nvif_mmu *mmu, u8 kind)
diff --git a/drivers/gpu/drm/nouveau/include/nvif/notify.h b/drivers/gpu/drm/nouveau/include/nvif/notify.h
index 6863732eb286..39f6b7ee1719 100644
--- a/drivers/gpu/drm/nouveau/include/nvif/notify.h
+++ b/drivers/gpu/drm/nouveau/include/nvif/notify.h
@@ -4,6 +4,7 @@
struct nvif_notify {
struct nvif_object *object;
+ const char *name;
int index;
#define NVIF_NOTIFY_USER 0
@@ -24,10 +25,10 @@ struct nvif_notify {
struct work_struct work;
};
-int nvif_notify_init(struct nvif_object *, int (*func)(struct nvif_notify *),
- bool work, u8 type, void *data, u32 size, u32 reply,
- struct nvif_notify *);
-int nvif_notify_fini(struct nvif_notify *);
+int nvif_notify_ctor(struct nvif_object *, const char *name,
+ int (*func)(struct nvif_notify *), bool work, u8 type,
+ void *data, u32 size, u32 reply, struct nvif_notify *);
+int nvif_notify_dtor(struct nvif_notify *);
int nvif_notify_get(struct nvif_notify *);
int nvif_notify_put(struct nvif_notify *);
int nvif_notify(const void *, u32, const void *, u32);
diff --git a/drivers/gpu/drm/nouveau/include/nvif/object.h b/drivers/gpu/drm/nouveau/include/nvif/object.h
index 604fabc0e689..1e4c158d20fa 100644
--- a/drivers/gpu/drm/nouveau/include/nvif/object.h
+++ b/drivers/gpu/drm/nouveau/include/nvif/object.h
@@ -1,7 +1,6 @@
/* SPDX-License-Identifier: MIT */
#ifndef __NVIF_OBJECT_H__
#define __NVIF_OBJECT_H__
-
#include <nvif/os.h>
struct nvif_sclass {
@@ -11,7 +10,9 @@ struct nvif_sclass {
};
struct nvif_object {
+ struct nvif_parent *parent;
struct nvif_client *client;
+ const char *name;
u32 handle;
s32 oclass;
void *priv; /*XXX: hack */
@@ -21,9 +22,9 @@ struct nvif_object {
} map;
};
-int nvif_object_init(struct nvif_object *, u32 handle, s32 oclass, void *, u32,
- struct nvif_object *);
-void nvif_object_fini(struct nvif_object *);
+int nvif_object_ctor(struct nvif_object *, const char *name, u32 handle,
+ s32 oclass, void *, u32, struct nvif_object *);
+void nvif_object_dtor(struct nvif_object *);
int nvif_object_ioctl(struct nvif_object *, void *, u32, void **);
int nvif_object_sclass_get(struct nvif_object *, struct nvif_sclass **);
void nvif_object_sclass_put(struct nvif_sclass **);
@@ -115,6 +116,19 @@ struct nvif_mclass {
_cid; \
})
+#define NVIF_RD32_(p,o,dr) nvif_rd32((p), (o) + (dr))
+#define NVIF_WR32_(p,o,dr,f) nvif_wr32((p), (o) + (dr), (f))
+#define NVIF_RD32(p,A...) DRF_RD(NVIF_RD32_, (p), 0, ##A)
+#define NVIF_RV32(p,A...) DRF_RV(NVIF_RD32_, (p), 0, ##A)
+#define NVIF_TV32(p,A...) DRF_TV(NVIF_RD32_, (p), 0, ##A)
+#define NVIF_TD32(p,A...) DRF_TD(NVIF_RD32_, (p), 0, ##A)
+#define NVIF_WR32(p,A...) DRF_WR( NVIF_WR32_, (p), 0, ##A)
+#define NVIF_WV32(p,A...) DRF_WV( NVIF_WR32_, (p), 0, ##A)
+#define NVIF_WD32(p,A...) DRF_WD( NVIF_WR32_, (p), 0, ##A)
+#define NVIF_MR32(p,A...) DRF_MR(NVIF_RD32_, NVIF_WR32_, u32, (p), 0, ##A)
+#define NVIF_MV32(p,A...) DRF_MV(NVIF_RD32_, NVIF_WR32_, u32, (p), 0, ##A)
+#define NVIF_MD32(p,A...) DRF_MD(NVIF_RD32_, NVIF_WR32_, u32, (p), 0, ##A)
+
/*XXX*/
#include <core/object.h>
#define nvxx_object(a) ({ \
diff --git a/drivers/gpu/drm/nouveau/include/nvif/parent.h b/drivers/gpu/drm/nouveau/include/nvif/parent.h
new file mode 100644
index 000000000000..41cb1b0d90d3
--- /dev/null
+++ b/drivers/gpu/drm/nouveau/include/nvif/parent.h
@@ -0,0 +1,25 @@
+/* SPDX-License-Identifier: MIT */
+#ifndef __NVIF_PARENT_H__
+#define __NVIF_PARENT_H__
+#include <nvif/os.h>
+struct nvif_object;
+
+struct nvif_parent {
+ const struct nvif_parent_func {
+ void (*debugf)(struct nvif_object *, const char *fmt, ...) __printf(2, 3);
+ void (*errorf)(struct nvif_object *, const char *fmt, ...) __printf(2, 3);
+ } *func;
+};
+
+static inline void
+nvif_parent_dtor(struct nvif_parent *parent)
+{
+ parent->func = NULL;
+}
+
+static inline void
+nvif_parent_ctor(const struct nvif_parent_func *func, struct nvif_parent *parent)
+{
+ parent->func = func;
+}
+#endif
diff --git a/drivers/gpu/drm/nouveau/include/nvif/printf.h b/drivers/gpu/drm/nouveau/include/nvif/printf.h
new file mode 100644
index 000000000000..6c299ec6be21
--- /dev/null
+++ b/drivers/gpu/drm/nouveau/include/nvif/printf.h
@@ -0,0 +1,20 @@
+/* SPDX-License-Identifier: MIT */
+#ifndef __NVIF_PRINTF_H__
+#define __NVIF_PRINTF_H__
+#include <nvif/client.h>
+#include <nvif/parent.h>
+
+#define NVIF_PRINT(l,o,f,a...) do { \
+ struct nvif_object *_o = (o); \
+ struct nvif_parent *_p = _o->parent; \
+ _p->func->l(_o, "[%s/%08x:%s] "f"\n", _o->client->object.name, _o->handle, _o->name, ##a); \
+} while(0)
+
+#ifndef NVIF_DEBUG_PRINT_DISABLE
+#define NVIF_DEBUG(o,f,a...) NVIF_PRINT(debugf, (o), f, ##a)
+#else
+#define NVIF_DEBUG(o,f,a...)
+#endif
+
+#define NVIF_ERROR(o,f,a...) NVIF_PRINT(errorf, (o), f, ##a)
+#endif
diff --git a/drivers/gpu/drm/nouveau/include/nvif/push.h b/drivers/gpu/drm/nouveau/include/nvif/push.h
new file mode 100644
index 000000000000..168d7694ede5
--- /dev/null
+++ b/drivers/gpu/drm/nouveau/include/nvif/push.h
@@ -0,0 +1,359 @@
+/*
+ * Copyright 2019 Red Hat Inc.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
+ * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ */
+#ifndef __NVIF_PUSH_H__
+#define __NVIF_PUSH_H__
+#include <nvif/mem.h>
+#include <nvif/printf.h>
+
+#include <nvhw/drf.h>
+
+struct nvif_push {
+ int (*wait)(struct nvif_push *push, u32 size);
+ void (*kick)(struct nvif_push *push);
+
+ struct nvif_mem mem;
+
+ u32 *bgn;
+ u32 *cur;
+ u32 *seg;
+ u32 *end;
+};
+
+static inline __must_check int
+PUSH_WAIT(struct nvif_push *push, u32 size)
+{
+ if (push->cur + size >= push->end) {
+ int ret = push->wait(push, size);
+ if (ret)
+ return ret;
+ }
+#ifdef CONFIG_NOUVEAU_DEBUG_PUSH
+ push->seg = push->cur + size;
+#endif
+ return 0;
+}
+
+static inline int
+PUSH_KICK(struct nvif_push *push)
+{
+ push->kick(push);
+ return 0;
+}
+
+#ifdef CONFIG_NOUVEAU_DEBUG_PUSH
+#define PUSH_PRINTF(p,f,a...) do { \
+ struct nvif_push *_ppp = (p); \
+ u32 __o = _ppp->cur - (u32 *)_ppp->mem.object.map.ptr; \
+ NVIF_DEBUG(&_ppp->mem.object, "%08x: "f, __o * 4, ##a); \
+ (void)__o; \
+} while(0)
+#define PUSH_ASSERT_ON(a,b) WARN((a), b)
+#else
+#define PUSH_PRINTF(p,f,a...)
+#define PUSH_ASSERT_ON(a, b)
+#endif
+
+#define PUSH_ASSERT(a,b) do { \
+ static_assert( \
+ __builtin_choose_expr(__builtin_constant_p(a), (a), 1), b \
+ ); \
+ PUSH_ASSERT_ON(!(a), b); \
+} while(0)
+
+#define PUSH_DATA__(p,d,f,a...) do { \
+ struct nvif_push *_p = (p); \
+ u32 _d = (d); \
+ PUSH_ASSERT(_p->cur < _p->seg, "segment overrun"); \
+ PUSH_ASSERT(_p->cur < _p->end, "pushbuf overrun"); \
+ PUSH_PRINTF(_p, "%08x"f, _d, ##a); \
+ *_p->cur++ = _d; \
+} while(0)
+
+#define PUSH_DATA_(X,p,m,i0,i1,d,s,f,a...) PUSH_DATA__((p), (d), "-> "#m f, ##a)
+#define PUSH_DATA(p,d) PUSH_DATA__((p), (d), " data - %s", __func__)
+
+//XXX: error-check this against *real* pushbuffer end?
+#define PUSH_RSVD(p,d) do { \
+ struct nvif_push *__p = (p); \
+ __p->seg++; \
+ __p->end++; \
+ d; \
+} while(0)
+
+#ifdef CONFIG_NOUVEAU_DEBUG_PUSH
+#define PUSH_DATAp(X,p,m,i,o,d,s,f,a...) do { \
+ struct nvif_push *_pp = (p); \
+ const u32 *_dd = (d); \
+ u32 _s = (s), _i = (i?PUSH_##o##_INC); \
+ if (_s--) { \
+ PUSH_DATA_(X, _pp, X##m, i0, i1, *_dd++, 1, "+0x%x", 0); \
+ while (_s--) { \
+ PUSH_DATA_(X, _pp, X##m, i0, i1, *_dd++, 1, "+0x%x", _i); \
+ _i += (0?PUSH_##o##_INC); \
+ } \
+ } \
+} while(0)
+#else
+#define PUSH_DATAp(X,p,m,i,o,d,s,f,a...) do { \
+ struct nvif_push *_p = (p); \
+ u32 _s = (s); \
+ PUSH_ASSERT(_p->cur + _s <= _p->seg, "segment overrun"); \
+ PUSH_ASSERT(_p->cur + _s <= _p->end, "pushbuf overrun"); \
+ memcpy(_p->cur, (d), _s << 2); \
+ _p->cur += _s; \
+} while(0)
+#endif
+
+#define PUSH_1(X,f,ds,n,c,o,p,s,mA,dA) do { \
+ PUSH_##o##_HDR((p), s, mA, (c)+(n)); \
+ PUSH_##f(X, (p), X##mA, 1, o, (dA), ds, ""); \
+} while(0)
+#define PUSH_2(X,f,ds,n,c,o,p,s,mB,dB,mA,dA,a...) do { \
+ PUSH_ASSERT((mB) - (mA) == (1?PUSH_##o##_INC), "mthd1"); \
+ PUSH_1(X, DATA_, 1, ds, (c)+(n), o, (p), s, X##mA, (dA), ##a); \
+ PUSH_##f(X, (p), X##mB, 0, o, (dB), ds, ""); \
+} while(0)
+#define PUSH_3(X,f,ds,n,c,o,p,s,mB,dB,mA,dA,a...) do { \
+ PUSH_ASSERT((mB) - (mA) == (0?PUSH_##o##_INC), "mthd2"); \
+ PUSH_2(X, DATA_, 1, ds, (c)+(n), o, (p), s, X##mA, (dA), ##a); \
+ PUSH_##f(X, (p), X##mB, 0, o, (dB), ds, ""); \
+} while(0)
+#define PUSH_4(X,f,ds,n,c,o,p,s,mB,dB,mA,dA,a...) do { \
+ PUSH_ASSERT((mB) - (mA) == (0?PUSH_##o##_INC), "mthd3"); \
+ PUSH_3(X, DATA_, 1, ds, (c)+(n), o, (p), s, X##mA, (dA), ##a); \
+ PUSH_##f(X, (p), X##mB, 0, o, (dB), ds, ""); \
+} while(0)
+#define PUSH_5(X,f,ds,n,c,o,p,s,mB,dB,mA,dA,a...) do { \
+ PUSH_ASSERT((mB) - (mA) == (0?PUSH_##o##_INC), "mthd4"); \
+ PUSH_4(X, DATA_, 1, ds, (c)+(n), o, (p), s, X##mA, (dA), ##a); \
+ PUSH_##f(X, (p), X##mB, 0, o, (dB), ds, ""); \
+} while(0)
+#define PUSH_6(X,f,ds,n,c,o,p,s,mB,dB,mA,dA,a...) do { \
+ PUSH_ASSERT((mB) - (mA) == (0?PUSH_##o##_INC), "mthd5"); \
+ PUSH_5(X, DATA_, 1, ds, (c)+(n), o, (p), s, X##mA, (dA), ##a); \
+ PUSH_##f(X, (p), X##mB, 0, o, (dB), ds, ""); \
+} while(0)
+#define PUSH_7(X,f,ds,n,c,o,p,s,mB,dB,mA,dA,a...) do { \
+ PUSH_ASSERT((mB) - (mA) == (0?PUSH_##o##_INC), "mthd6"); \
+ PUSH_6(X, DATA_, 1, ds, (c)+(n), o, (p), s, X##mA, (dA), ##a); \
+ PUSH_##f(X, (p), X##mB, 0, o, (dB), ds, ""); \
+} while(0)
+#define PUSH_8(X,f,ds,n,c,o,p,s,mB,dB,mA,dA,a...) do { \
+ PUSH_ASSERT((mB) - (mA) == (0?PUSH_##o##_INC), "mthd7"); \
+ PUSH_7(X, DATA_, 1, ds, (c)+(n), o, (p), s, X##mA, (dA), ##a); \
+ PUSH_##f(X, (p), X##mB, 0, o, (dB), ds, ""); \
+} while(0)
+#define PUSH_9(X,f,ds,n,c,o,p,s,mB,dB,mA,dA,a...) do { \
+ PUSH_ASSERT((mB) - (mA) == (0?PUSH_##o##_INC), "mthd8"); \
+ PUSH_8(X, DATA_, 1, ds, (c)+(n), o, (p), s, X##mA, (dA), ##a); \
+ PUSH_##f(X, (p), X##mB, 0, o, (dB), ds, ""); \
+} while(0)
+#define PUSH_10(X,f,ds,n,c,o,p,s,mB,dB,mA,dA,a...) do { \
+ PUSH_ASSERT((mB) - (mA) == (0?PUSH_##o##_INC), "mthd9"); \
+ PUSH_9(X, DATA_, 1, ds, (c)+(n), o, (p), s, X##mA, (dA), ##a); \
+ PUSH_##f(X, (p), X##mB, 0, o, (dB), ds, ""); \
+} while(0)
+
+#define PUSH_1D(X,o,p,s,mA,dA) \
+ PUSH_1(X, DATA_, 1, 1, 0, o, (p), s, X##mA, (dA))
+#define PUSH_2D(X,o,p,s,mA,dA,mB,dB) \
+ PUSH_2(X, DATA_, 1, 1, 0, o, (p), s, X##mB, (dB), \
+ X##mA, (dA))
+#define PUSH_3D(X,o,p,s,mA,dA,mB,dB,mC,dC) \
+ PUSH_3(X, DATA_, 1, 1, 0, o, (p), s, X##mC, (dC), \
+ X##mB, (dB), \
+ X##mA, (dA))
+#define PUSH_4D(X,o,p,s,mA,dA,mB,dB,mC,dC,mD,dD) \
+ PUSH_4(X, DATA_, 1, 1, 0, o, (p), s, X##mD, (dD), \
+ X##mC, (dC), \
+ X##mB, (dB), \
+ X##mA, (dA))
+#define PUSH_5D(X,o,p,s,mA,dA,mB,dB,mC,dC,mD,dD,mE,dE) \
+ PUSH_5(X, DATA_, 1, 1, 0, o, (p), s, X##mE, (dE), \
+ X##mD, (dD), \
+ X##mC, (dC), \
+ X##mB, (dB), \
+ X##mA, (dA))
+#define PUSH_6D(X,o,p,s,mA,dA,mB,dB,mC,dC,mD,dD,mE,dE,mF,dF) \
+ PUSH_6(X, DATA_, 1, 1, 0, o, (p), s, X##mF, (dF), \
+ X##mE, (dE), \
+ X##mD, (dD), \
+ X##mC, (dC), \
+ X##mB, (dB), \
+ X##mA, (dA))
+#define PUSH_7D(X,o,p,s,mA,dA,mB,dB,mC,dC,mD,dD,mE,dE,mF,dF,mG,dG) \
+ PUSH_7(X, DATA_, 1, 1, 0, o, (p), s, X##mG, (dG), \
+ X##mF, (dF), \
+ X##mE, (dE), \
+ X##mD, (dD), \
+ X##mC, (dC), \
+ X##mB, (dB), \
+ X##mA, (dA))
+#define PUSH_8D(X,o,p,s,mA,dA,mB,dB,mC,dC,mD,dD,mE,dE,mF,dF,mG,dG,mH,dH) \
+ PUSH_8(X, DATA_, 1, 1, 0, o, (p), s, X##mH, (dH), \
+ X##mG, (dG), \
+ X##mF, (dF), \
+ X##mE, (dE), \
+ X##mD, (dD), \
+ X##mC, (dC), \
+ X##mB, (dB), \
+ X##mA, (dA))
+#define PUSH_9D(X,o,p,s,mA,dA,mB,dB,mC,dC,mD,dD,mE,dE,mF,dF,mG,dG,mH,dH,mI,dI) \
+ PUSH_9(X, DATA_, 1, 1, 0, o, (p), s, X##mI, (dI), \
+ X##mH, (dH), \
+ X##mG, (dG), \
+ X##mF, (dF), \
+ X##mE, (dE), \
+ X##mD, (dD), \
+ X##mC, (dC), \
+ X##mB, (dB), \
+ X##mA, (dA))
+#define PUSH_10D(X,o,p,s,mA,dA,mB,dB,mC,dC,mD,dD,mE,dE,mF,dF,mG,dG,mH,dH,mI,dI,mJ,dJ) \
+ PUSH_10(X, DATA_, 1, 1, 0, o, (p), s, X##mJ, (dJ), \
+ X##mI, (dI), \
+ X##mH, (dH), \
+ X##mG, (dG), \
+ X##mF, (dF), \
+ X##mE, (dE), \
+ X##mD, (dD), \
+ X##mC, (dC), \
+ X##mB, (dB), \
+ X##mA, (dA))
+
+#define PUSH_1P(X,o,p,s,mA,dp,ds) \
+ PUSH_1(X, DATAp, ds, ds, 0, o, (p), s, X##mA, (dp))
+#define PUSH_2P(X,o,p,s,mA,dA,mB,dp,ds) \
+ PUSH_2(X, DATAp, ds, ds, 0, o, (p), s, X##mB, (dp), \
+ X##mA, (dA))
+#define PUSH_3P(X,o,p,s,mA,dA,mB,dB,mC,dp,ds) \
+ PUSH_3(X, DATAp, ds, ds, 0, o, (p), s, X##mC, (dp), \
+ X##mB, (dB), \
+ X##mA, (dA))
+
+#define PUSH_(A,B,C,D,E,F,G,H,I,J,K,L,M,N,O,P,Q,R,S,T,U,V,W,X,IMPL,...) IMPL
+#define PUSH(A...) PUSH_(A, PUSH_10P, PUSH_10D, \
+ PUSH_9P , PUSH_9D, \
+ PUSH_8P , PUSH_8D, \
+ PUSH_7P , PUSH_7D, \
+ PUSH_6P , PUSH_6D, \
+ PUSH_5P , PUSH_5D, \
+ PUSH_4P , PUSH_4D, \
+ PUSH_3P , PUSH_3D, \
+ PUSH_2P , PUSH_2D, \
+ PUSH_1P , PUSH_1D)(, ##A)
+
+#define PUSH_NVIM(p,c,m,d) do { \
+ struct nvif_push *__p = (p); \
+ u32 __d = (d); \
+ PUSH_IMMD_HDR(__p, c, m, __d); \
+ __p->cur--; \
+ PUSH_PRINTF(__p, "%08x-> "#m, __d); \
+ __p->cur++; \
+} while(0)
+#define PUSH_NVSQ(A...) PUSH(MTHD, ##A)
+#define PUSH_NV1I(A...) PUSH(1INC, ##A)
+#define PUSH_NVNI(A...) PUSH(NINC, ##A)
+
+
+#define PUSH_NV_1(X,o,p,c,mA,d...) \
+ PUSH_##o(p,c,c##_##mA,d)
+#define PUSH_NV_2(X,o,p,c,mA,dA,mB,d...) \
+ PUSH_##o(p,c,c##_##mA,dA, \
+ c##_##mB,d)
+#define PUSH_NV_3(X,o,p,c,mA,dA,mB,dB,mC,d...) \
+ PUSH_##o(p,c,c##_##mA,dA, \
+ c##_##mB,dB, \
+ c##_##mC,d)
+#define PUSH_NV_4(X,o,p,c,mA,dA,mB,dB,mC,dC,mD,d...) \
+ PUSH_##o(p,c,c##_##mA,dA, \
+ c##_##mB,dB, \
+ c##_##mC,dC, \
+ c##_##mD,d)
+#define PUSH_NV_5(X,o,p,c,mA,dA,mB,dB,mC,dC,mD,dD,mE,d...) \
+ PUSH_##o(p,c,c##_##mA,dA, \
+ c##_##mB,dB, \
+ c##_##mC,dC, \
+ c##_##mD,dD, \
+ c##_##mE,d)
+#define PUSH_NV_6(X,o,p,c,mA,dA,mB,dB,mC,dC,mD,dD,mE,dE,mF,d...) \
+ PUSH_##o(p,c,c##_##mA,dA, \
+ c##_##mB,dB, \
+ c##_##mC,dC, \
+ c##_##mD,dD, \
+ c##_##mE,dE, \
+ c##_##mF,d)
+#define PUSH_NV_7(X,o,p,c,mA,dA,mB,dB,mC,dC,mD,dD,mE,dE,mF,dF,mG,d...) \
+ PUSH_##o(p,c,c##_##mA,dA, \
+ c##_##mB,dB, \
+ c##_##mC,dC, \
+ c##_##mD,dD, \
+ c##_##mE,dE, \
+ c##_##mF,dF, \
+ c##_##mG,d)
+#define PUSH_NV_8(X,o,p,c,mA,dA,mB,dB,mC,dC,mD,dD,mE,dE,mF,dF,mG,dG,mH,d...) \
+ PUSH_##o(p,c,c##_##mA,dA, \
+ c##_##mB,dB, \
+ c##_##mC,dC, \
+ c##_##mD,dD, \
+ c##_##mE,dE, \
+ c##_##mF,dF, \
+ c##_##mG,dG, \
+ c##_##mH,d)
+#define PUSH_NV_9(X,o,p,c,mA,dA,mB,dB,mC,dC,mD,dD,mE,dE,mF,dF,mG,dG,mH,dH,mI,d...) \
+ PUSH_##o(p,c,c##_##mA,dA, \
+ c##_##mB,dB, \
+ c##_##mC,dC, \
+ c##_##mD,dD, \
+ c##_##mE,dE, \
+ c##_##mF,dF, \
+ c##_##mG,dG, \
+ c##_##mH,dH, \
+ c##_##mI,d)
+#define PUSH_NV_10(X,o,p,c,mA,dA,mB,dB,mC,dC,mD,dD,mE,dE,mF,dF,mG,dG,mH,dH,mI,dI,mJ,d...) \
+ PUSH_##o(p,c,c##_##mA,dA, \
+ c##_##mB,dB, \
+ c##_##mC,dC, \
+ c##_##mD,dD, \
+ c##_##mE,dE, \
+ c##_##mF,dF, \
+ c##_##mG,dG, \
+ c##_##mH,dH, \
+ c##_##mI,dI, \
+ c##_##mJ,d)
+
+#define PUSH_NV_(A,B,C,D,E,F,G,H,I,J,K,L,M,N,O,P,Q,R,S,T,U,V,W,X,IMPL,...) IMPL
+#define PUSH_NV(A...) PUSH_NV_(A, PUSH_NV_10, PUSH_NV_10, \
+ PUSH_NV_9 , PUSH_NV_9, \
+ PUSH_NV_8 , PUSH_NV_8, \
+ PUSH_NV_7 , PUSH_NV_7, \
+ PUSH_NV_6 , PUSH_NV_6, \
+ PUSH_NV_5 , PUSH_NV_5, \
+ PUSH_NV_4 , PUSH_NV_4, \
+ PUSH_NV_3 , PUSH_NV_3, \
+ PUSH_NV_2 , PUSH_NV_2, \
+ PUSH_NV_1 , PUSH_NV_1)(, ##A)
+
+#define PUSH_IMMD(A...) PUSH_NV(NVIM, ##A)
+#define PUSH_MTHD(A...) PUSH_NV(NVSQ, ##A)
+#define PUSH_1INC(A...) PUSH_NV(NV1I, ##A)
+#define PUSH_NINC(A...) PUSH_NV(NVNI, ##A)
+#endif
diff --git a/drivers/gpu/drm/nouveau/include/nvif/push006c.h b/drivers/gpu/drm/nouveau/include/nvif/push006c.h
new file mode 100644
index 000000000000..a31c147e72c7
--- /dev/null
+++ b/drivers/gpu/drm/nouveau/include/nvif/push006c.h
@@ -0,0 +1,73 @@
+#ifndef __NVIF_PUSH006C_H__
+#define __NVIF_PUSH006C_H__
+#include <nvif/push.h>
+
+#include <nvhw/class/cl006c.h>
+
+#ifndef PUSH006C_SUBC
+// Host methods
+#define PUSH006C_SUBC_NV06E 0
+#define PUSH006C_SUBC_NV176E 0
+#define PUSH006C_SUBC_NV826F 0
+
+// ContextSurfaces2d
+#define PUSH006C_SUBC_NV042 0
+#define PUSH006C_SUBC_NV062 0
+
+// ContextClipRectangle
+#define PUSH006C_SUBC_NV019 0
+
+// ContextRop
+#define PUSH006C_SUBC_NV043 0
+
+// ContextPattern
+#define PUSH006C_SUBC_NV044 0
+
+// Misc dodginess...
+#define PUSH006C_SUBC_NV_SW 1
+
+// ImageBlit
+#define PUSH006C_SUBC_NV05F 2
+#define PUSH006C_SUBC_NV09F 2
+
+// GdiRectangleText
+#define PUSH006C_SUBC_NV04A 3
+
+// Twod
+#define PUSH006C_SUBC_NV502D 3
+
+// MemoryToMemoryFormat
+#define PUSH006C_SUBC_NV039 4
+#define PUSH006C_SUBC_NV5039 4
+
+// DmaCopy
+#define PUSH006C_SUBC_NV85B5 4
+
+// Cipher
+#define PUSH006C_SUBC_NV74C1 4
+#endif
+
+#define PUSH_HDR(p,o,n,s,m,c) do { \
+ PUSH_ASSERT(!((s) & ~DRF_MASK(NV06C_METHOD_SUBCHANNEL)), "subc"); \
+ PUSH_ASSERT(!((m) & ~DRF_SMASK(NV06C_METHOD_ADDRESS)), "mthd"); \
+ PUSH_ASSERT(!((c) & ~DRF_MASK(NV06C_METHOD_COUNT)), "count"); \
+ PUSH_DATA__((p), NVVAL_X(NV06C_METHOD_ADDRESS, (m) >> 2) | \
+ NVVAL_X(NV06C_METHOD_SUBCHANNEL, (s)) | \
+ NVVAL_X(NV06C_METHOD_COUNT, (c)) | \
+ NVVAL_X(NV06C_OPCODE, NV06C_OPCODE_##o), \
+ " "n" subc %d mthd 0x%04x size %d - %s", \
+ (u32)(s), (u32)(m), (u32)(c), __func__); \
+} while(0)
+
+#define PUSH_MTHD_HDR(p,c,m,n) PUSH_HDR(p, METHOD, "incr", PUSH006C_SUBC_##c, m, n)
+#define PUSH_MTHD_INC 4:4
+#define PUSH_NINC_HDR(p,c,m,n) PUSH_HDR(p, NONINC_METHOD, "ninc", PUSH006C_SUBC_##c, m, n)
+#define PUSH_NINC_INC 0:0
+
+#define PUSH_JUMP(p,o) do { \
+ PUSH_ASSERT(!((o) & ~0x1fffffffcULL), "offset"); \
+ PUSH_DATA__((p), NVVAL_X(NV06C_OPCODE, NV06C_OPCODE_JUMP) | \
+ NVVAL_X(NV06C_JUMP_OFFSET, (o) >> 2), \
+ " jump 0x%08x - %s", (u32)(o), __func__); \
+} while(0)
+#endif
diff --git a/drivers/gpu/drm/nouveau/include/nvif/push206e.h b/drivers/gpu/drm/nouveau/include/nvif/push206e.h
new file mode 100644
index 000000000000..1dfb8a35423e
--- /dev/null
+++ b/drivers/gpu/drm/nouveau/include/nvif/push206e.h
@@ -0,0 +1,13 @@
+#ifndef __NVIF_PUSH206E_H__
+#define __NVIF_PUSH206E_H__
+#include <nvif/push006c.h>
+
+#include <nvhw/class/cl206e.h>
+
+#define PUSH_CALL(p,o) do { \
+ PUSH_ASSERT(!((o) & ~0xffffffffcULL), "offset"); \
+ PUSH_DATA__((p), NVDEF(NV206E, DMA, OPCODE2, CALL) | \
+ NVVAL(NV206E, DMA, CALL_OFFSET, (o) >> 2), \
+ " call 0x%08x - %s", (u32)(o), __func__); \
+} while(0)
+#endif
diff --git a/drivers/gpu/drm/nouveau/include/nvif/push507c.h b/drivers/gpu/drm/nouveau/include/nvif/push507c.h
new file mode 100644
index 000000000000..889467f13fd9
--- /dev/null
+++ b/drivers/gpu/drm/nouveau/include/nvif/push507c.h
@@ -0,0 +1,25 @@
+#ifndef __NVIF_PUSH507C_H__
+#define __NVIF_PUSH507C_H__
+#include <nvif/push.h>
+
+#include <nvhw/class/cl507c.h>
+
+#define PUSH_HDR(p,m,c) do { \
+ PUSH_ASSERT(!((m) & ~DRF_SMASK(NV507C_DMA_METHOD_OFFSET)), "mthd"); \
+ PUSH_ASSERT(!((c) & ~DRF_MASK(NV507C_DMA_METHOD_COUNT)), "size"); \
+ PUSH_DATA__((p), NVDEF(NV507C, DMA, OPCODE, METHOD) | \
+ NVVAL(NV507C, DMA, METHOD_COUNT, (c)) | \
+ NVVAL(NV507C, DMA, METHOD_OFFSET, (m) >> 2), \
+ " mthd 0x%04x size %d - %s", (u32)(m), (u32)(c), __func__); \
+} while(0)
+
+#define PUSH_MTHD_HDR(p,s,m,c) PUSH_HDR(p,m,c)
+#define PUSH_MTHD_INC 4:4
+
+#define PUSH_JUMP(p,o) do { \
+ PUSH_ASSERT(!((o) & ~DRF_SMASK(NV507C_DMA_JUMP_OFFSET)), "offset"); \
+ PUSH_DATA__((p), NVDEF(NV507C, DMA, OPCODE, JUMP) | \
+ NVVAL(NV507C, DMA, JUMP_OFFSET, (o) >> 2), \
+ "jump 0x%08x - %s", (u32)(o), __func__); \
+} while(0)
+#endif
diff --git a/drivers/gpu/drm/nouveau/include/nvif/push906f.h b/drivers/gpu/drm/nouveau/include/nvif/push906f.h
new file mode 100644
index 000000000000..cc2866bc8b0a
--- /dev/null
+++ b/drivers/gpu/drm/nouveau/include/nvif/push906f.h
@@ -0,0 +1,48 @@
+#ifndef __NVIF_PUSH906F_H__
+#define __NVIF_PUSH906F_H__
+#include <nvif/push.h>
+
+#include <nvhw/class/cl906f.h>
+
+#ifndef PUSH906F_SUBC
+// Host methods
+#define PUSH906F_SUBC_NV906F 0
+
+// Twod
+#define PUSH906F_SUBC_NV902D 3
+
+// MemoryToMemoryFormat
+#define PUSH906F_SUBC_NV9039 4
+
+// DmaCopy
+#define PUSH906F_SUBC_NV90B5 4
+#define PUSH906F_SUBC_NVA0B5 4
+#endif
+
+#define PUSH_HDR(p,o,n,f,s,m,c) do { \
+ PUSH_ASSERT(!((s) & ~DRF_MASK(NV906F_DMA_METHOD_SUBCHANNEL)), "subc"); \
+ PUSH_ASSERT(!((m) & ~(DRF_MASK(NV906F_DMA_METHOD_ADDRESS) << 2)), "mthd"); \
+ PUSH_ASSERT(!((c) & ~DRF_MASK(NV906F_DMA_METHOD_COUNT)), "count/immd"); \
+ PUSH_DATA__((p), NVVAL(NV906F, DMA, METHOD_ADDRESS, (m) >> 2) | \
+ NVVAL(NV906F, DMA, METHOD_SUBCHANNEL, (s)) | \
+ NVVAL(NV906F, DMA, METHOD_COUNT, (c)) | \
+ NVDEF(NV906F, DMA, SEC_OP, o), \
+ " "n" subc %d mthd 0x%04x "f" - %s", \
+ (u32)(s), (u32)(m), (u32)(c), __func__); \
+} while(0)
+
+#define PUSH_MTHD_INC 4:4
+#define PUSH_MTHD_HDR(p,c,m,n) \
+ PUSH_HDR(p, INC_METHOD, "incr", "size %d", PUSH906F_SUBC_##c, m, n)
+
+#define PUSH_NINC_INC 0:0
+#define PUSH_NINC_HDR(p,c,m,n) \
+ PUSH_HDR(p, NON_INC_METHOD, "ninc", "size %d", PUSH906F_SUBC_##c, m, n)
+
+#define PUSH_IMMD_HDR(p,c,m,n) \
+ PUSH_HDR(p, IMMD_DATA_METHOD, "immd", "data 0x%04x", PUSH906F_SUBC_##c, m, n)
+
+#define PUSH_1INC_INC 4:0
+#define PUSH_1INC_HDR(p,c,m,n) \
+ PUSH_HDR(p, ONE_INC, "oinc", "size %d", PUSH906F_SUBC_##c, m, n)
+#endif
diff --git a/drivers/gpu/drm/nouveau/include/nvif/pushc37b.h b/drivers/gpu/drm/nouveau/include/nvif/pushc37b.h
new file mode 100644
index 000000000000..8f0c45703e33
--- /dev/null
+++ b/drivers/gpu/drm/nouveau/include/nvif/pushc37b.h
@@ -0,0 +1,18 @@
+#ifndef __NVIF_PUSHC37B_H__
+#define __NVIF_PUSHC37B_H__
+#include <nvif/push.h>
+
+#include <nvhw/class/clc37b.h>
+
+#define PUSH_HDR(p,m,c) do { \
+ PUSH_ASSERT(!((m) & ~DRF_SMASK(NVC37B_DMA_METHOD_OFFSET)), "mthd"); \
+ PUSH_ASSERT(!((c) & ~DRF_MASK(NVC37B_DMA_METHOD_COUNT)), "size"); \
+ PUSH_DATA__((p), NVDEF(NVC37B, DMA, OPCODE, METHOD) | \
+ NVVAL(NVC37B, DMA, METHOD_COUNT, (c)) | \
+ NVVAL(NVC37B, DMA, METHOD_OFFSET, (m) >> 2), \
+ " mthd 0x%04x size %d - %s", (u32)(m), (u32)(c), __func__); \
+} while(0)
+
+#define PUSH_MTHD_HDR(p,s,m,c) PUSH_HDR(p,m,c)
+#define PUSH_MTHD_INC 4:4
+#endif
diff --git a/drivers/gpu/drm/nouveau/include/nvif/user.h b/drivers/gpu/drm/nouveau/include/nvif/user.h
index 6825574d93c2..146986a9fe53 100644
--- a/drivers/gpu/drm/nouveau/include/nvif/user.h
+++ b/drivers/gpu/drm/nouveau/include/nvif/user.h
@@ -13,8 +13,8 @@ struct nvif_user_func {
u64 (*time)(struct nvif_user *);
};
-int nvif_user_init(struct nvif_device *);
-void nvif_user_fini(struct nvif_device *);
+int nvif_user_ctor(struct nvif_device *, const char *name);
+void nvif_user_dtor(struct nvif_device *);
extern const struct nvif_user_func nvif_userc361;
#endif
diff --git a/drivers/gpu/drm/nouveau/include/nvif/vmm.h b/drivers/gpu/drm/nouveau/include/nvif/vmm.h
index 79bf85d2f43a..a2ee92201ace 100644
--- a/drivers/gpu/drm/nouveau/include/nvif/vmm.h
+++ b/drivers/gpu/drm/nouveau/include/nvif/vmm.h
@@ -30,9 +30,9 @@ struct nvif_vmm {
int page_nr;
};
-int nvif_vmm_init(struct nvif_mmu *, s32 oclass, bool managed, u64 addr,
- u64 size, void *argv, u32 argc, struct nvif_vmm *);
-void nvif_vmm_fini(struct nvif_vmm *);
+int nvif_vmm_ctor(struct nvif_mmu *, const char *name, s32 oclass, bool managed,
+ u64 addr, u64 size, void *argv, u32 argc, struct nvif_vmm *);
+void nvif_vmm_dtor(struct nvif_vmm *);
int nvif_vmm_get(struct nvif_vmm *, enum nvif_vmm_get, bool sparse,
u8 page, u8 align, u64 size, struct nvif_vma *);
void nvif_vmm_put(struct nvif_vmm *, struct nvif_vma *);