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| author |   Dmitry Osipenko <digetx@gmail.com> | 2018-05-04 17:40:00 +0300 |
|---|---|---|
| committer |   Thierry Reding <treding@nvidia.com> | 2018-05-17 14:08:44 +0200 |
| commit | a43d0a00ea58a665905d94e8ab469ff888b1b0e1 (patch) | |
| tree | 51fb07edba34c17dd9464bdbb1ade49cabc56698 /drivers/gpu/drm/tegra/dc.h | |
| parent | drm/tegra: plane: Implement zpos plane property for older Tegras (diff) | |
| download | wireguard-linux-a43d0a00ea58a665905d94e8ab469ff888b1b0e1.tar.xz wireguard-linux-a43d0a00ea58a665905d94e8ab469ff888b1b0e1.zip | |
drm/tegra: dc: Rename supports_blending to has_legacy_blending
Older Tegra chips do support blending as well. Rename the SoC info entry
.supports_blending to .has_legacy_blending to eliminate the confusion.
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Diffstat (limited to 'drivers/gpu/drm/tegra/dc.h')
| -rw-r--r-- | drivers/gpu/drm/tegra/dc.h | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/gpu/drm/tegra/dc.h b/drivers/gpu/drm/tegra/dc.h index 556321fde9d2..e96f582ca692 100644 --- a/drivers/gpu/drm/tegra/dc.h +++ b/drivers/gpu/drm/tegra/dc.h @@ -55,7 +55,7 @@ struct tegra_dc_soc_info { bool supports_interlacing; bool supports_cursor; bool supports_block_linear; - bool supports_blending; + bool has_legacy_blending; unsigned int pitch_align; bool has_powergate; bool coupled_pm; |