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authorDmitry Osipenko <digetx@gmail.com>2018-05-04 17:39:58 +0300
committerThierry Reding <treding@nvidia.com>2018-05-17 14:08:44 +0200
commitacc6a3a9afdd4e0537342012656cdb5c4a3127c5 (patch)
tree51c4a4280fdecd57d3ed457bd0eb4073bfadad56 /drivers/gpu/drm/tegra/dc.h
parentdrm/tegra: Refactor IOMMU attach/detach (diff)
downloadwireguard-linux-acc6a3a9afdd4e0537342012656cdb5c4a3127c5.tar.xz
wireguard-linux-acc6a3a9afdd4e0537342012656cdb5c4a3127c5.zip
drm/tegra: dc: Enable plane scaling filters
Currently resized plane produces a "pixelated" image which doesn't look nice, especially in a case of a video overlay. Enable scaling filters that significantly improve image quality of a scaled overlay. Signed-off-by: Dmitry Osipenko <digetx@gmail.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
Diffstat (limited to 'drivers/gpu/drm/tegra/dc.h')
-rw-r--r--drivers/gpu/drm/tegra/dc.h7
1 files changed, 7 insertions, 0 deletions
diff --git a/drivers/gpu/drm/tegra/dc.h b/drivers/gpu/drm/tegra/dc.h
index 7be786febb17..556321fde9d2 100644
--- a/drivers/gpu/drm/tegra/dc.h
+++ b/drivers/gpu/drm/tegra/dc.h
@@ -67,6 +67,8 @@ struct tegra_dc_soc_info {
const u32 *overlay_formats;
unsigned int num_overlay_formats;
const u64 *modifiers;
+ bool has_win_a_without_filters;
+ bool has_win_c_without_vert_filter;
};
struct tegra_dc {
@@ -553,6 +555,9 @@ int tegra_dc_rgb_exit(struct tegra_dc *dc);
#define THREAD_NUM(x) (((x) & 0x1f) << 1)
#define THREAD_GROUP_ENABLE (1 << 0)
+#define DC_WIN_H_FILTER_P(p) (0x601 + (p))
+#define DC_WIN_V_FILTER_P(p) (0x619 + (p))
+
#define DC_WIN_CSC_YOF 0x611
#define DC_WIN_CSC_KYRGB 0x612
#define DC_WIN_CSC_KUR 0x613
@@ -566,6 +571,8 @@ int tegra_dc_rgb_exit(struct tegra_dc *dc);
#define H_DIRECTION (1 << 0)
#define V_DIRECTION (1 << 2)
#define COLOR_EXPAND (1 << 6)
+#define H_FILTER (1 << 8)
+#define V_FILTER (1 << 10)
#define CSC_ENABLE (1 << 18)
#define WIN_ENABLE (1 << 30)