diff options
| author |   Thierry Reding <treding@nvidia.com> | 2017-10-12 19:12:57 +0200 |
|---|---|---|
| committer | Thierry Reding <treding@nvidia.com> | 2017-12-13 14:36:36 +0100 |
| commit | c57997bce423fb71334a1fefa524569e48a1718f (patch) | |
| tree | cc01f3938060f960a0b8b3f3a52f17408ad47389 /drivers/gpu/drm/tegra/dc.h | |
| parent | drm/tegra: sor: Parameterize register offsets (diff) | |
| download | wireguard-linux-c57997bce423fb71334a1fefa524569e48a1718f.tar.xz wireguard-linux-c57997bce423fb71334a1fefa524569e48a1718f.zip | |
drm/tegra: sor: Add Tegra186 support
The SOR found on Tegra186 is very similar to the one found on Tegra210
and earlier. However, due to some changes in the display architecture,
some programming sequences have changed and some register have moved
around.
Signed-off-by: Thierry Reding <treding@nvidia.com>
Diffstat (limited to 'drivers/gpu/drm/tegra/dc.h')
| -rw-r--r-- | drivers/gpu/drm/tegra/dc.h | 5 |
1 files changed, 3 insertions, 2 deletions
diff --git a/drivers/gpu/drm/tegra/dc.h b/drivers/gpu/drm/tegra/dc.h index 018fea74fb50..336d2c22f521 100644 --- a/drivers/gpu/drm/tegra/dc.h +++ b/drivers/gpu/drm/tegra/dc.h @@ -141,6 +141,7 @@ struct tegra_dc_window { }; /* from dc.c */ +bool tegra_dc_has_output(struct tegra_dc *dc, struct device *dev); void tegra_dc_commit(struct tegra_dc *dc); int tegra_dc_state_setup_clock(struct tegra_dc *dc, struct drm_crtc_state *crtc_state, @@ -289,10 +290,10 @@ int tegra_dc_rgb_exit(struct tegra_dc *dc); #define HDMI_ENABLE (1 << 30) #define DSI_ENABLE (1 << 29) #define SOR1_TIMING_CYA (1 << 27) -#define SOR1_ENABLE (1 << 26) -#define SOR_ENABLE (1 << 25) #define CURSOR_ENABLE (1 << 16) +#define SOR_ENABLE(x) (1 << (25 + (x))) + #define DC_DISP_DISP_MEM_HIGH_PRIORITY 0x403 #define CURSOR_THRESHOLD(x) (((x) & 0x03) << 24) #define WINDOW_A_THRESHOLD(x) (((x) & 0x7f) << 16) |