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| author |   Chris Wilson <chris@chris-wilson.co.uk> | 2017-02-15 08:43:50 +0000 |
|---|---|---|
| committer | Chris Wilson <chris@chris-wilson.co.uk> | 2017-02-15 10:07:29 +0000 |
| commit | ec151f31cd81cc99b957d6b528709d6ecfb25801 (patch) | |
| tree | 738e5f33a2064c7e934f4ecbffce3d1cb1def0be /drivers/gpu | |
| parent | drm/i915: Remove bitmap tracking for used-pml4 (diff) | |
| download | wireguard-linux-ec151f31cd81cc99b957d6b528709d6ecfb25801.tar.xz wireguard-linux-ec151f31cd81cc99b957d6b528709d6ecfb25801.zip | |
drm/i915: Remove superfluous posting reads after clear GGTT
The barrier here is not required - we apply the barrier before the range
is ever reused by the GPU instead.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Matthew Auld <matthew.auld@intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/20170215084357.19977-16-chris@chris-wilson.co.uk
Diffstat (limited to 'drivers/gpu')
| -rw-r--r-- | drivers/gpu/drm/i915/i915_gem_gtt.c | 3 |
1 files changed, 0 insertions, 3 deletions
diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c b/drivers/gpu/drm/i915/i915_gem_gtt.c index 76ec3fa0a67a..234a65e8f7b1 100644 --- a/drivers/gpu/drm/i915/i915_gem_gtt.c +++ b/drivers/gpu/drm/i915/i915_gem_gtt.c @@ -2184,7 +2184,6 @@ static void gen8_ggtt_clear_range(struct i915_address_space *vm, for (i = 0; i < num_entries; i++) gen8_set_pte(>t_base[i], scratch_pte); - readl(gtt_base); } static void gen6_ggtt_clear_range(struct i915_address_space *vm, @@ -2209,7 +2208,6 @@ static void gen6_ggtt_clear_range(struct i915_address_space *vm, for (i = 0; i < num_entries; i++) iowrite32(scratch_pte, >t_base[i]); - readl(gtt_base); } static void i915_ggtt_insert_page(struct i915_address_space *vm, @@ -2233,7 +2231,6 @@ static void i915_ggtt_insert_entries(struct i915_address_space *vm, AGP_USER_MEMORY : AGP_USER_CACHED_MEMORY; intel_gtt_insert_sg_entries(pages, start >> PAGE_SHIFT, flags); - } static void i915_ggtt_clear_range(struct i915_address_space *vm, |