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| author |   Alexander Stein <alexander.stein@systec-electronic.com> | 2016-11-30 17:34:15 +0100 |
|---|---|---|
| committer |   Wolfram Sang <wsa@the-dreams.de> | 2016-12-01 23:38:43 +0100 |
| commit | 531ccabbe4cc2d09234e9009d47f7f2539c6d047 (patch) | |
| tree | 14af8f1a1c3a7618c444c18a3e373533b5c79455 /drivers/i2c/busses | |
| parent | i2c: pxa: Add support for the I2C units found in Armada 3700 (diff) | |
| download | wireguard-linux-531ccabbe4cc2d09234e9009d47f7f2539c6d047.tar.xz wireguard-linux-531ccabbe4cc2d09234e9009d47f7f2539c6d047.zip | |
i2c: designware-pcidrv: Add 10bit address feature to medfield/merrifield
Both Merrifield TRM and Medfield TRM state:
"Both 7-bit and 10-bit addressing modes are supported."
Signed-off-by: Alexander Stein <alexander.stein@systec-electronic.com>
Acked-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Acked-by: Jarkko Nikula <jarkko.nikula@linux.intel.com>
Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
Diffstat (limited to 'drivers/i2c/busses')
| -rw-r--r-- | drivers/i2c/busses/i2c-designware-pcidrv.c | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/drivers/i2c/busses/i2c-designware-pcidrv.c b/drivers/i2c/busses/i2c-designware-pcidrv.c index 300802e75d2e..d6423cfac588 100644 --- a/drivers/i2c/busses/i2c-designware-pcidrv.c +++ b/drivers/i2c/busses/i2c-designware-pcidrv.c @@ -141,6 +141,7 @@ static struct dw_pci_controller dw_pci_controllers[] = { .bus_cfg = INTEL_MID_STD_CFG | DW_IC_CON_SPEED_FAST, .tx_fifo_depth = 32, .rx_fifo_depth = 32, + .functionality = I2C_FUNC_10BIT_ADDR, .clk_khz = 25000, .setup = mfld_setup, }, @@ -149,6 +150,7 @@ static struct dw_pci_controller dw_pci_controllers[] = { .bus_cfg = INTEL_MID_STD_CFG | DW_IC_CON_SPEED_FAST, .tx_fifo_depth = 64, .rx_fifo_depth = 64, + .functionality = I2C_FUNC_10BIT_ADDR, .scl_sda_cfg = &mrfld_config, .setup = mrfld_setup, }, |