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authorNicolin Chen <nicoleotsuka@gmail.com>2019-12-19 16:29:11 -0800
committerThierry Reding <treding@nvidia.com>2020-01-10 15:34:06 +0100
commit5f5636ef1de9174db8333787086a0e105938a2c5 (patch)
treede89c88e82083aff116313eceb88b2ba64e3d8f4 /drivers/memory
parentmemory: tegra: Add support for the Tegra194 memory controller (diff)
downloadwireguard-linux-5f5636ef1de9174db8333787086a0e105938a2c5.tar.xz
wireguard-linux-5f5636ef1de9174db8333787086a0e105938a2c5.zip
memory: tegra: Correct reset value of xusb_hostr
According to Tegra X1 (Tegra210) TRM, the reset value of xusb_hostr field (bit [7:0]) should be 0x7a. So this patch simply corrects it. Signed-off-by: Nicolin Chen <nicoleotsuka@gmail.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
Diffstat (limited to 'drivers/memory')
-rw-r--r--drivers/memory/tegra/tegra210.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/memory/tegra/tegra210.c b/drivers/memory/tegra/tegra210.c
index b420268173fc..cc0482434c75 100644
--- a/drivers/memory/tegra/tegra210.c
+++ b/drivers/memory/tegra/tegra210.c
@@ -436,7 +436,7 @@ static const struct tegra_mc_client tegra210_mc_clients[] = {
.reg = 0x37c,
.shift = 0,
.mask = 0xff,
- .def = 0x39,
+ .def = 0x7a,
},
}, {
.id = 0x4b,