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| author |   Paul Cercueil <paul@crapouillou.net> | 2020-07-28 17:26:29 +0200 |
|---|---|---|
| committer |   Krzysztof Kozlowski <krzk@kernel.org> | 2020-07-28 17:34:15 +0200 |
| commit | f046e4a3f0b95bcc410116acbe7e04e648d48f97 (patch) | |
| tree | 40ea9ebabcf01ae32b8c070280e36754825662bd /drivers/memory | |
| parent | MAINTAINERS: Add Git repository for memory controller drivers (diff) | |
| download | wireguard-linux-f046e4a3f0b95bcc410116acbe7e04e648d48f97.tar.xz wireguard-linux-f046e4a3f0b95bcc410116acbe7e04e648d48f97.zip | |
memory: jz4780_nemc: Only request IO memory the driver will use
The driver only uses the registers up to offset 0x54. Since the EFUSE
registers are in the middle of the NEMC registers, we only request
the registers we will use for now - that way the EFUSE driver can
probe too.
Signed-off-by: Paul Cercueil <paul@crapouillou.net>
Tested-by: H. Nikolaus Schaller <hns@goldelico.com>
Link: https://lore.kernel.org/r/20200728152629.28878-1-paul@crapouillou.net
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Diffstat (limited to 'drivers/memory')
| -rw-r--r-- | drivers/memory/jz4780-nemc.c | 17 |
1 files changed, 16 insertions, 1 deletions
diff --git a/drivers/memory/jz4780-nemc.c b/drivers/memory/jz4780-nemc.c index b232ed279fc3..3ec5cb0fce1e 100644 --- a/drivers/memory/jz4780-nemc.c +++ b/drivers/memory/jz4780-nemc.c @@ -8,6 +8,7 @@ #include <linux/clk.h> #include <linux/init.h> +#include <linux/io.h> #include <linux/math64.h> #include <linux/of.h> #include <linux/of_address.h> @@ -22,6 +23,8 @@ #define NEMC_SMCRn(n) (0x14 + (((n) - 1) * 4)) #define NEMC_NFCSR 0x50 +#define NEMC_REG_LEN 0x54 + #define NEMC_SMCR_SMT BIT(0) #define NEMC_SMCR_BW_SHIFT 6 #define NEMC_SMCR_BW_MASK (0x3 << NEMC_SMCR_BW_SHIFT) @@ -288,7 +291,19 @@ static int jz4780_nemc_probe(struct platform_device *pdev) nemc->dev = dev; res = platform_get_resource(pdev, IORESOURCE_MEM, 0); - nemc->base = devm_ioremap_resource(dev, res); + + /* + * The driver currently only uses the registers up to offset + * NEMC_REG_LEN. Since the EFUSE registers are in the middle of the + * NEMC registers, we only request the registers we will use for now; + * that way the EFUSE driver can probe too. + */ + if (!devm_request_mem_region(dev, res->start, NEMC_REG_LEN, dev_name(dev))) { + dev_err(dev, "unable to request I/O memory region\n"); + return -EBUSY; + } + + nemc->base = devm_ioremap(dev, res->start, NEMC_REG_LEN); if (IS_ERR(nemc->base)) { dev_err(dev, "failed to get I/O memory\n"); return PTR_ERR(nemc->base); |