diff options
author | 2011-03-10 10:53:15 +0100 | |
---|---|---|
committer | 2011-03-10 11:04:00 +0100 | |
commit | b9ccf8afe2d2eafe18f90d2925f8464313fe0b56 (patch) | |
tree | d6fc73de26b1344736a59965b336bb7c6b245a31 /drivers/mmc/host/omap_hsmmc.c | |
parent | Merge branch 'omap-l3-for-next' of git://dev.omapzoom.org/pub/scm/santosh/kernel-omap4-base into omap-for-linus (diff) | |
download | wireguard-linux-b9ccf8afe2d2eafe18f90d2925f8464313fe0b56.tar.xz wireguard-linux-b9ccf8afe2d2eafe18f90d2925f8464313fe0b56.zip |
OMAP3: hwmod data: Fix incorrect SmartReflex -> L4 CORE interconnect links
Commit d34427267186827dfd62bd8cf726601fffb22534 ("OMAP3: PM: Adding
smartreflex hwmod data") added data that claims that the L4 CORE has
two slave interfaces that originate from the SmartReflex modules,
omap3_l4_core__sr1 and omap3_l4_core__sr2. But as those two data
structure records show, it's L4 CORE that has a master port towards
SR1 and SR2.
Move the incorrect data from slaves list to master list.
Based on a path by Paul Walmsley <paul@pwsan.com>
https://patchwork.kernel.org/patch/623171/
That is based on a patch by Benoît Cousson <b-cousson@ti.com>:
https://patchwork.kernel.org/patch/590561/
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Signed-off-by: Benoît Cousson <b-cousson@ti.com>
Cc: Sanjeev Premi <premi@ti.com>
Cc: Thara Gopinath <thara@ti.com>
Diffstat (limited to 'drivers/mmc/host/omap_hsmmc.c')
0 files changed, 0 insertions, 0 deletions