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| author |   Linus Torvalds <torvalds@linux-foundation.org> | 2016-09-28 12:53:08 -0700 |
|---|---|---|
| committer | Linus Torvalds <torvalds@linux-foundation.org> | 2016-09-28 12:53:08 -0700 |
| commit | ae6dd8d61913b5341067c7c660e8e91430d22e7c (patch) | |
| tree | 51636068899cf37b2cc830611ef819124dae4bd9 /drivers/mtd | |
| parent | MAINTAINERS: Update my e-mail (diff) | |
| parent | mtd: nand: davinci: Reinitialize the HW ECC engine in 4bit hwctl (diff) | |
| download | wireguard-linux-ae6dd8d61913b5341067c7c660e8e91430d22e7c.tar.xz wireguard-linux-ae6dd8d61913b5341067c7c660e8e91430d22e7c.zip | |
Merge tag 'for-linus-20160928' of git://git.infradead.org/linux-mtd
Pull late MTD fixes from Brian Norris:
"Another round of MTD fixes for v4.8
My apologies for sending this so late. I've been fairly absent as a
maintainer this cycle, but I did queue these up weeks ago. In the
meantime, Richard was able to handle some other fixes (thanks!) but
didn't pick these up.
On the bright side, these are very simple changes that should carry
little risk.
Summary:
- Davinci NAND: fix a long-standing bug in how we clear/prep 4-bit ECC
- OMAP NAND: an error-handling fix that made it into v4.8-rc1 caused
error-handling cases in other configurations/code-paths; this fixes
the fix"
* tag 'for-linus-20160928' of git://git.infradead.org/linux-mtd:
mtd: nand: davinci: Reinitialize the HW ECC engine in 4bit hwctl
mtd: nand: omap2: Don't call dma_release_channel() if dma_request_chan() failed
Diffstat (limited to 'drivers/mtd')
| -rw-r--r-- | drivers/mtd/nand/davinci_nand.c | 3 | ||||
| -rw-r--r-- | drivers/mtd/nand/omap2.c | 2 |
2 files changed, 4 insertions, 1 deletions
diff --git a/drivers/mtd/nand/davinci_nand.c b/drivers/mtd/nand/davinci_nand.c index cc07ba0f044d..27fa8b87cd5f 100644 --- a/drivers/mtd/nand/davinci_nand.c +++ b/drivers/mtd/nand/davinci_nand.c @@ -240,6 +240,9 @@ static void nand_davinci_hwctl_4bit(struct mtd_info *mtd, int mode) unsigned long flags; u32 val; + /* Reset ECC hardware */ + davinci_nand_readl(info, NAND_4BIT_ECC1_OFFSET); + spin_lock_irqsave(&davinci_nand_lock, flags); /* Start 4-bit ECC calculation for read/write */ diff --git a/drivers/mtd/nand/omap2.c b/drivers/mtd/nand/omap2.c index a59361c36f40..5513bfd9cdc9 100644 --- a/drivers/mtd/nand/omap2.c +++ b/drivers/mtd/nand/omap2.c @@ -2169,7 +2169,7 @@ scan_tail: return 0; return_error: - if (info->dma) + if (!IS_ERR_OR_NULL(info->dma)) dma_release_channel(info->dma); if (nand_chip->ecc.priv) { nand_bch_free(nand_chip->ecc.priv); |