diff options
| author |   Stefan Chulski <stefanc@marvell.com> | 2021-02-11 12:48:50 +0200 |
|---|---|---|
| committer |   David S. Miller <davem@davemloft.net> | 2021-02-11 14:50:23 -0800 |
| commit | e54ad1e01c00d35dcae8eff7954221fc8c700888 (patch) | |
| tree | b4066a022dcb27002b8a63d40fe0aa01052d9f5b /drivers/net/ethernet/marvell/mvpp2/mvpp2.h | |
| parent | dts: marvell: add CM3 SRAM memory to cp11x ethernet device tree (diff) | |
| download | wireguard-linux-e54ad1e01c00d35dcae8eff7954221fc8c700888.tar.xz wireguard-linux-e54ad1e01c00d35dcae8eff7954221fc8c700888.zip | |
net: mvpp2: add CM3 SRAM memory map
This patch adds CM3 memory map.
Signed-off-by: Stefan Chulski <stefanc@marvell.com>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Acked-by: Marcin Wojtas <mw@semihalf.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers/net/ethernet/marvell/mvpp2/mvpp2.h')
| -rw-r--r-- | drivers/net/ethernet/marvell/mvpp2/mvpp2.h | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/net/ethernet/marvell/mvpp2/mvpp2.h b/drivers/net/ethernet/marvell/mvpp2/mvpp2.h index 6bd7e405e830..56e90ab5b402 100644 --- a/drivers/net/ethernet/marvell/mvpp2/mvpp2.h +++ b/drivers/net/ethernet/marvell/mvpp2/mvpp2.h @@ -925,6 +925,7 @@ struct mvpp2 { /* Shared registers' base addresses */ void __iomem *lms_base; void __iomem *iface_base; + void __iomem *cm3_base; /* On PPv2.2, each "software thread" can access the base * register through a separate address space, each 64 KB apart |