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author | Hamdan Igbaria <hamdani@mellanox.com> | 2019-09-08 13:46:25 +0300 |
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committer | Saeed Mahameed <saeedm@mellanox.com> | 2019-11-01 14:55:14 -0700 |
commit | 40416d8ede651d26ce334f496a336aa1d38d1c97 (patch) | |
tree | 8ba316ce4e857a9e4b208d90690d285a8f075f46 /drivers/net/ethernet/mellanox/mlx5/core/steering/dr_ste.c | |
parent | hp100: Move 100BaseVG AnyLAN driver to staging (diff) | |
download | wireguard-linux-40416d8ede651d26ce334f496a336aa1d38d1c97.tar.xz wireguard-linux-40416d8ede651d26ce334f496a336aa1d38d1c97.zip |
net/mlx5: DR, Replace CRC32 implementation to use kernel lib
Use kernel function to calculate crc32 Instead of dr implementation
since it has the same algorithm "slice by 8".
Fixes: 26d688e33f88 ("net/mlx5: DR, Add Steering entry (STE) utilities")
Signed-off-by: Hamdan Igbaria <hamdani@mellanox.com>
Reviewed-by: Alex Vesker <valex@mellanox.com>
Signed-off-by: Saeed Mahameed <saeedm@mellanox.com>
Diffstat (limited to 'drivers/net/ethernet/mellanox/mlx5/core/steering/dr_ste.c')
-rw-r--r-- | drivers/net/ethernet/mellanox/mlx5/core/steering/dr_ste.c | 10 |
1 files changed, 9 insertions, 1 deletions
diff --git a/drivers/net/ethernet/mellanox/mlx5/core/steering/dr_ste.c b/drivers/net/ethernet/mellanox/mlx5/core/steering/dr_ste.c index 4efe1b0be4a8..7e9d6cfc356f 100644 --- a/drivers/net/ethernet/mellanox/mlx5/core/steering/dr_ste.c +++ b/drivers/net/ethernet/mellanox/mlx5/core/steering/dr_ste.c @@ -2,6 +2,7 @@ /* Copyright (c) 2019 Mellanox Technologies. */ #include <linux/types.h> +#include <linux/crc32.h> #include "dr_types.h" #define DR_STE_CRC_POLY 0xEDB88320L @@ -107,6 +108,13 @@ struct dr_hw_ste_format { u8 mask[DR_STE_SIZE_MASK]; }; +static u32 dr_ste_crc32_calc(const void *input_data, size_t length) +{ + u32 crc = crc32(0, input_data, length); + + return htonl(crc); +} + u32 mlx5dr_ste_calc_hash_index(u8 *hw_ste_p, struct mlx5dr_ste_htbl *htbl) { struct dr_hw_ste_format *hw_ste = (struct dr_hw_ste_format *)hw_ste_p; @@ -128,7 +136,7 @@ u32 mlx5dr_ste_calc_hash_index(u8 *hw_ste_p, struct mlx5dr_ste_htbl *htbl) bit = bit >> 1; } - crc32 = mlx5dr_crc32_slice8_calc(masked, DR_STE_SIZE_TAG); + crc32 = dr_ste_crc32_calc(masked, DR_STE_SIZE_TAG); index = crc32 & (htbl->chunk->num_of_entries - 1); return index; |