diff options
author | Ido Schimmel <idosch@nvidia.com> | 2021-03-11 14:24:16 +0200 |
---|---|---|
committer | David S. Miller <davem@davemloft.net> | 2021-03-11 16:22:39 -0800 |
commit | cf31190ae0b788159a9874f0b28bbfde994741cd (patch) | |
tree | a06fea40c1ae27e95fe78d2cade39419aa68680b /drivers/net/ethernet/mellanox/mlxsw/spectrum_trap.c | |
parent | mlxsw: spectrum_trap: Split sampling traps between ASICs (diff) | |
download | wireguard-linux-cf31190ae0b788159a9874f0b28bbfde994741cd.tar.xz wireguard-linux-cf31190ae0b788159a9874f0b28bbfde994741cd.zip |
mlxsw: spectrum_matchall: Implement sampling using mirroring
Spectrum-2 and later ASICs support sampling of packets by mirroring to
the CPU with probability. There are several advantages compared to the
legacy dedicated sampling mechanism:
* Extra metadata per-packet: Egress port, egress traffic class, traffic
class occupancy and end-to-end latency
* Ability to sample packets on egress / per-flow
Convert Spectrum-2 and later ASICs to perform sampling by mirroring to
the CPU with probability.
Subsequent patches will add support for egress / per-flow sampling and
expose the extra metadata.
Signed-off-by: Ido Schimmel <idosch@nvidia.com>
Reviewed-by: Jiri Pirko <jiri@nvidia.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers/net/ethernet/mellanox/mlxsw/spectrum_trap.c')
-rw-r--r-- | drivers/net/ethernet/mellanox/mlxsw/spectrum_trap.c | 8 |
1 files changed, 6 insertions, 2 deletions
diff --git a/drivers/net/ethernet/mellanox/mlxsw/spectrum_trap.c b/drivers/net/ethernet/mellanox/mlxsw/spectrum_trap.c index 6ecc77fde095..e0e6ee58d31a 100644 --- a/drivers/net/ethernet/mellanox/mlxsw/spectrum_trap.c +++ b/drivers/net/ethernet/mellanox/mlxsw/spectrum_trap.c @@ -49,6 +49,8 @@ enum { #define MLXSW_SP_TRAP_METADATA DEVLINK_TRAP_METADATA_TYPE_F_IN_PORT enum { + /* Packet was mirrored from ingress. */ + MLXSW_SP_MIRROR_REASON_INGRESS = 1, /* Packet was early dropped. */ MLXSW_SP_MIRROR_REASON_INGRESS_WRED = 9, }; @@ -1753,6 +1755,7 @@ mlxsw_sp2_trap_group_items_arr[] = { .group = DEVLINK_TRAP_GROUP_GENERIC(ACL_SAMPLE, 0), .hw_group_id = MLXSW_REG_HTGT_TRAP_GROUP_SP_PKT_SAMPLE, .priority = 0, + .fixed_policer = true, }, }; @@ -1769,8 +1772,9 @@ mlxsw_sp2_trap_items_arr[] = { .trap = MLXSW_SP_TRAP_CONTROL(FLOW_ACTION_SAMPLE, ACL_SAMPLE, MIRROR), .listeners_arr = { - MLXSW_RXL(mlxsw_sp_rx_sample_listener, PKT_SAMPLE, - MIRROR_TO_CPU, false, SP_PKT_SAMPLE, DISCARD), + MLXSW_RXL_MIRROR(mlxsw_sp_rx_sample_listener, 1, + SP_PKT_SAMPLE, + MLXSW_SP_MIRROR_REASON_INGRESS), }, }, }; |