diff options
| author |   Alex Elder <elder@linaro.org> | 2020-06-29 16:55:22 -0500 |
|---|---|---|
| committer |   David S. Miller <davem@davemloft.net> | 2020-07-01 15:27:09 -0700 |
| commit | 1d86652b13e8404ee42b6575d97ed228e92547d6 (patch) | |
| tree | c699a71f0ac72ed19949a049b4b20372c9de9423 /drivers/net/ipa/ipa_endpoint.c | |
| parent | net: ipa: rework ipa_aggr_granularity_val() (diff) | |
| download | wireguard-linux-1d86652b13e8404ee42b6575d97ed228e92547d6.tar.xz wireguard-linux-1d86652b13e8404ee42b6575d97ed228e92547d6.zip | |
net: ipa: reduce aggregation time limit
Halve the time limit used when aggregation is enabled on an RX
endpoint, to half a millisecond.
Use DIV_ROUND_CLOSEST() to compute the value that represents the
time period, to get better accuracy in the event the time limit is
not an even multiple of the granularity.
Signed-off-by: Alex Elder <elder@linaro.org>
Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers/net/ipa/ipa_endpoint.c')
| -rw-r--r-- | drivers/net/ipa/ipa_endpoint.c | 8 |
1 files changed, 5 insertions, 3 deletions
diff --git a/drivers/net/ipa/ipa_endpoint.c b/drivers/net/ipa/ipa_endpoint.c index 9f50d0d11704..93449366d7d8 100644 --- a/drivers/net/ipa/ipa_endpoint.c +++ b/drivers/net/ipa/ipa_endpoint.c @@ -36,7 +36,7 @@ #define IPA_ENDPOINT_QMAP_METADATA_MASK 0x000000ff /* host byte order */ #define IPA_ENDPOINT_RESET_AGGR_RETRY_MAX 3 -#define IPA_AGGR_TIME_LIMIT_DEFAULT 1000 /* microseconds */ +#define IPA_AGGR_TIME_LIMIT_DEFAULT 500 /* microseconds */ /** enum ipa_status_opcode - status element opcode hardware values */ enum ipa_status_opcode { @@ -583,9 +583,11 @@ static void ipa_endpoint_init_aggr(struct ipa_endpoint *endpoint) val |= u32_encode_bits(IPA_GENERIC, AGGR_TYPE_FMASK); val |= u32_encode_bits(aggr_size, AGGR_BYTE_LIMIT_FMASK); + limit = IPA_AGGR_TIME_LIMIT_DEFAULT; - val |= u32_encode_bits(limit / IPA_AGGR_GRANULARITY, - AGGR_TIME_LIMIT_FMASK); + limit = DIV_ROUND_CLOSEST(limit, IPA_AGGR_GRANULARITY); + val |= u32_encode_bits(limit, AGGR_TIME_LIMIT_FMASK); + val |= u32_encode_bits(0, AGGR_PKT_LIMIT_FMASK); if (endpoint->data->rx.aggr_close_eof) val |= AGGR_SW_EOF_ACTIVE_FMASK; |