diff options
| author |   Russell King <rmk+kernel@armlinux.org.uk> | 2020-01-03 20:43:23 +0000 |
|---|---|---|
| committer |   David S. Miller <davem@davemloft.net> | 2020-01-05 15:05:35 -0800 |
| commit | e0f909bc3a242296da9ccff78277f26d4883a79d (patch) | |
| tree | 030546ddba4271e8f33cbcf6e98b9e89a63b2d34 /drivers/net/phy/marvell10g.c | |
| parent | net: phy: add PHY_INTERFACE_MODE_10GBASER (diff) | |
| download | wireguard-linux-e0f909bc3a242296da9ccff78277f26d4883a79d.tar.xz wireguard-linux-e0f909bc3a242296da9ccff78277f26d4883a79d.zip | |
net: switch to using PHY_INTERFACE_MODE_10GBASER rather than 10GKR
Switch network drivers, phy drivers, and SFP/phylink over to use the
more correct 10GBASE-R, rather than 10GBASE-KR. 10GBASE-KR is backplane
ethernet, which is 10GBASE-R with autonegotiation on top, which our
current usage on the affected platforms does not have.
The only remaining user of PHY_INTERFACE_MODE_10GKR is the Aquantia
PHY, which has a separate mode for 10GBASE-KR.
For Marvell mvpp2, we detect 10GBASE-KR, and rewrite it to 10GBASE-R
for compatibility with existing DT - this is the only network driver
at present that makes use of PHY_INTERFACE_MODE_10GKR.
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers/net/phy/marvell10g.c')
| -rw-r--r-- | drivers/net/phy/marvell10g.c | 11 |
1 files changed, 6 insertions, 5 deletions
diff --git a/drivers/net/phy/marvell10g.c b/drivers/net/phy/marvell10g.c index 512f27b0b5cd..64c9f3bba2cd 100644 --- a/drivers/net/phy/marvell10g.c +++ b/drivers/net/phy/marvell10g.c @@ -216,7 +216,7 @@ static int mv3310_sfp_insert(void *upstream, const struct sfp_eeprom_id *id) sfp_parse_support(phydev->sfp_bus, id, support); iface = sfp_select_interface(phydev->sfp_bus, support); - if (iface != PHY_INTERFACE_MODE_10GKR) { + if (iface != PHY_INTERFACE_MODE_10GBASER) { dev_err(&phydev->mdio.dev, "incompatible SFP module inserted\n"); return -EINVAL; } @@ -304,7 +304,7 @@ static int mv3310_config_init(struct phy_device *phydev) phydev->interface != PHY_INTERFACE_MODE_2500BASEX && phydev->interface != PHY_INTERFACE_MODE_XAUI && phydev->interface != PHY_INTERFACE_MODE_RXAUI && - phydev->interface != PHY_INTERFACE_MODE_10GKR) + phydev->interface != PHY_INTERFACE_MODE_10GBASER) return -ENODEV; return 0; @@ -386,16 +386,17 @@ static void mv3310_update_interface(struct phy_device *phydev) { if ((phydev->interface == PHY_INTERFACE_MODE_SGMII || phydev->interface == PHY_INTERFACE_MODE_2500BASEX || - phydev->interface == PHY_INTERFACE_MODE_10GKR) && phydev->link) { + phydev->interface == PHY_INTERFACE_MODE_10GBASER) && + phydev->link) { /* The PHY automatically switches its serdes interface (and - * active PHYXS instance) between Cisco SGMII, 10GBase-KR and + * active PHYXS instance) between Cisco SGMII, 10GBase-R and * 2500BaseX modes according to the speed. Florian suggests * setting phydev->interface to communicate this to the MAC. * Only do this if we are already in one of the above modes. */ switch (phydev->speed) { case SPEED_10000: - phydev->interface = PHY_INTERFACE_MODE_10GKR; + phydev->interface = PHY_INTERFACE_MODE_10GBASER; break; case SPEED_2500: phydev->interface = PHY_INTERFACE_MODE_2500BASEX; |