aboutsummaryrefslogtreecommitdiffstatshomepage
path: root/drivers/net/usb/smsc95xx.h
diff options
context:
space:
mode:
authorSteve Glendinning <steve.glendinning@shawell.net>2012-11-22 08:05:24 +0000
committerDavid S. Miller <davem@davemloft.net>2012-11-23 14:15:18 -0500
commite5e3af8348945b7c0b96e720c35309c79c24e98f (patch)
treeae237dd7282e990b4cbb0f59c3a52297ed58c6a3 /drivers/net/usb/smsc95xx.h
parentsmsc95xx: detect chip revision specific features (diff)
downloadwireguard-linux-e5e3af8348945b7c0b96e720c35309c79c24e98f.tar.xz
wireguard-linux-e5e3af8348945b7c0b96e720c35309c79c24e98f.zip
smsc95xx: support PHY wakeup source
This patch enables LAN9500 family devices to wake from suspend on either link up or link down events It also adds _nopm versions of mdio access functions, so we can safely call them from suspend and resume functions Signed-off-by: Steve Glendinning <steve.glendinning@shawell.net> Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers/net/usb/smsc95xx.h')
-rw-r--r--drivers/net/usb/smsc95xx.h17
1 files changed, 17 insertions, 0 deletions
diff --git a/drivers/net/usb/smsc95xx.h b/drivers/net/usb/smsc95xx.h
index 99f04a251a4e..f360ee372554 100644
--- a/drivers/net/usb/smsc95xx.h
+++ b/drivers/net/usb/smsc95xx.h
@@ -226,6 +226,23 @@
/* Vendor-specific PHY Definitions */
+/* EDPD NLP / crossover time configuration (LAN9500A only) */
+#define PHY_EDPD_CONFIG (16)
+#define PHY_EDPD_CONFIG_TX_NLP_EN_ ((u16)0x8000)
+#define PHY_EDPD_CONFIG_TX_NLP_1000_ ((u16)0x0000)
+#define PHY_EDPD_CONFIG_TX_NLP_768_ ((u16)0x2000)
+#define PHY_EDPD_CONFIG_TX_NLP_512_ ((u16)0x4000)
+#define PHY_EDPD_CONFIG_TX_NLP_256_ ((u16)0x6000)
+#define PHY_EDPD_CONFIG_RX_1_NLP_ ((u16)0x1000)
+#define PHY_EDPD_CONFIG_RX_NLP_64_ ((u16)0x0000)
+#define PHY_EDPD_CONFIG_RX_NLP_256_ ((u16)0x0400)
+#define PHY_EDPD_CONFIG_RX_NLP_512_ ((u16)0x0800)
+#define PHY_EDPD_CONFIG_RX_NLP_1000_ ((u16)0x0C00)
+#define PHY_EDPD_CONFIG_EXT_CROSSOVER_ ((u16)0x0001)
+#define PHY_EDPD_CONFIG_DEFAULT (PHY_EDPD_CONFIG_TX_NLP_EN_ | \
+ PHY_EDPD_CONFIG_TX_NLP_768_ | \
+ PHY_EDPD_CONFIG_RX_1_NLP_)
+
/* Mode Control/Status Register */
#define PHY_MODE_CTRL_STS (17)
#define MODE_CTRL_STS_EDPWRDOWN_ ((u16)0x2000)