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| author |   Russell King (Oracle) <rmk+kernel@armlinux.org.uk> | 2025-06-16 22:06:27 +0100 |
|---|---|---|
| committer |   Jakub Kicinski <kuba@kernel.org> | 2025-06-17 16:25:20 -0700 |
| commit | 1a3a638d2d23467cd9db06eb2bfdf4c185a8e9db (patch) | |
| tree | 6f541045f25a8743cd7bbd6bbc8fcd3e50094820 /drivers/net/wireguard/socket.c | |
| parent | net: stmmac: visconti: reorganise visconti_eth_set_clk_tx_rate() (diff) | |
| download | wireguard-linux-1a3a638d2d23467cd9db06eb2bfdf4c185a8e9db.tar.xz wireguard-linux-1a3a638d2d23467cd9db06eb2bfdf4c185a8e9db.zip | |
net: stmmac: visconti: clean up code formatting
Ensure that code is wrapped prior to column 80, and shorten the
needlessly long "clk_sel_val" to just "clk_sel".
Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Link: https://patch.msgid.link/E1uRH2B-004UyS-Ch@rmk-PC.armlinux.org.uk
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
Diffstat (limited to 'drivers/net/wireguard/socket.c')
0 files changed, 0 insertions, 0 deletions