diff options
| author |   Felix Fietkau <nbd@nbd.name> | 2019-10-30 13:11:27 +0100 |
|---|---|---|
| committer | Felix Fietkau <nbd@nbd.name> | 2020-02-14 10:05:58 +0100 |
| commit | 5dabdf71e94e4583a1111b6d833e00e6eef373d1 (patch) | |
| tree | 6ec3e7230f5b6df6f093434b436f5c2c6a76b3b8 /drivers/net/wireless/mediatek/mt76/mt7615/mcu.h | |
| parent | mt76: mt7615: remove useless MT_HW_RDD0/1 enum (diff) | |
| download | wireguard-linux-5dabdf71e94e4583a1111b6d833e00e6eef373d1.tar.xz wireguard-linux-5dabdf71e94e4583a1111b6d833e00e6eef373d1.zip | |
mt76: mt7615: add multiple wiphy support to the dfs support code
There are two DFS detectors on the chip. When using 160 MHz channel bandwidth
(not supported in dual-wiphy mode), both are used. Otherwise, one detector is
used per wiphy.
Rework the code to start/stop them separately per phy and to indicate the
radar event on the right phy based on the detector index
Signed-off-by: Felix Fietkau <nbd@nbd.name>
Diffstat (limited to 'drivers/net/wireless/mediatek/mt76/mt7615/mcu.h')
| -rw-r--r-- | drivers/net/wireless/mediatek/mt76/mt7615/mcu.h | 46 |
1 files changed, 46 insertions, 0 deletions
diff --git a/drivers/net/wireless/mediatek/mt76/mt7615/mcu.h b/drivers/net/wireless/mediatek/mt76/mt7615/mcu.h index 1fd7dffa6eef..f4781477fc9b 100644 --- a/drivers/net/wireless/mediatek/mt76/mt7615/mcu.h +++ b/drivers/net/wireless/mediatek/mt76/mt7615/mcu.h @@ -60,6 +60,52 @@ struct mt7615_mcu_rxd { u8 s2d_index; }; +struct mt7615_mcu_rdd_report { + struct mt7615_mcu_rxd rxd; + + u8 idx; + u8 long_detected; + u8 constant_prf_detected; + u8 staggered_prf_detected; + u8 radar_type_idx; + u8 periodic_pulse_num; + u8 long_pulse_num; + u8 hw_pulse_num; + + u8 out_lpn; + u8 out_spn; + u8 out_crpn; + u8 out_crpw; + u8 out_crbn; + u8 out_stgpn; + u8 out_stgpw; + + u8 _rsv[2]; + + __le32 out_pri_const; + __le32 out_pri_stg[3]; + + struct { + __le32 start; + __le16 pulse_width; + __le16 pulse_power; + } long_pulse[32]; + + struct { + __le32 start; + __le16 pulse_width; + __le16 pulse_power; + } periodic_pulse[32]; + + struct { + __le32 start; + __le16 pulse_width; + __le16 pulse_power; + u8 sc_pass; + u8 sw_reset; + } hw_pulse[32]; +}; + #define MCU_PQ_ID(p, q) (((p) << 15) | ((q) << 10)) #define MCU_PKT_ID 0xa0 |