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| author |   Thomas Gleixner <tglx@linutronix.de> | 2018-08-06 20:56:34 +0200 |
|---|---|---|
| committer | Thomas Gleixner <tglx@linutronix.de> | 2018-08-06 20:56:34 +0200 |
| commit | 315706049c343794ad0d3e5b6f6b60b900457b11 (patch) | |
| tree | 0a1596a4b5843a6262d17b4c656715854784977d /drivers/pci/controller/dwc | |
| parent | x86/speculation: Support Enhanced IBRS on future CPUs (diff) | |
| parent | x86/mm/init: Remove freed kernel image areas from alias mapping (diff) | |
| download | wireguard-linux-315706049c343794ad0d3e5b6f6b60b900457b11.tar.xz wireguard-linux-315706049c343794ad0d3e5b6f6b60b900457b11.zip | |
Merge branch 'x86/pti-urgent' into x86/pti
Integrate the PTI Global bit fixes which conflict with the 32bit PTI
support.
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Diffstat (limited to 'drivers/pci/controller/dwc')
| -rw-r--r-- | drivers/pci/controller/dwc/pcie-designware-host.c | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/drivers/pci/controller/dwc/pcie-designware-host.c b/drivers/pci/controller/dwc/pcie-designware-host.c index 781aa03aeede..29a05759a294 100644 --- a/drivers/pci/controller/dwc/pcie-designware-host.c +++ b/drivers/pci/controller/dwc/pcie-designware-host.c @@ -363,7 +363,8 @@ int dw_pcie_host_init(struct pcie_port *pp) resource_list_for_each_entry_safe(win, tmp, &bridge->windows) { switch (resource_type(win->res)) { case IORESOURCE_IO: - ret = pci_remap_iospace(win->res, pp->io_base); + ret = devm_pci_remap_iospace(dev, win->res, + pp->io_base); if (ret) { dev_warn(dev, "Error %d: failed to map resource %pR\n", ret, win->res); |