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| author |   Dong Aisheng <aisheng.dong@nxp.com> | 2017-07-25 21:41:56 +0800 |
|---|---|---|
| committer |   Linus Walleij <linus.walleij@linaro.org> | 2017-08-14 15:01:01 +0200 |
| commit | 26d1f4382225dfdcafd5d63d06531a90cba47c0f (patch) | |
| tree | 1c10aaab0736e7e821d7f739209f4189cf45cb9b /drivers/pinctrl/freescale | |
| parent | pinctrl: imx: make imx_pmx_ops.gpio_set_direction platform specific callbacks (diff) | |
| download | wireguard-linux-26d1f4382225dfdcafd5d63d06531a90cba47c0f.tar.xz wireguard-linux-26d1f4382225dfdcafd5d63d06531a90cba47c0f.zip | |
pinctrl: pinctrl-imx7ulp: add gpio_set_direction support
Add gpio_set_direction support. This makes the driver support
GPIO input/output dynamically change from userspace.
Cc: Alexandre Courbot <gnurou@gmail.com>
Cc: Stefan Agner <stefan@agner.ch>
Cc: Fugang Duan <fugang.duan@nxp.com>
Cc: Bai Ping <ping.bai@nxp.com>
Acked-by: Shawn Guo <shawnguo@kernel.org>
Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Diffstat (limited to 'drivers/pinctrl/freescale')
| -rw-r--r-- | drivers/pinctrl/freescale/pinctrl-imx7ulp.c | 26 |
1 files changed, 26 insertions, 0 deletions
diff --git a/drivers/pinctrl/freescale/pinctrl-imx7ulp.c b/drivers/pinctrl/freescale/pinctrl-imx7ulp.c index 96127dc7863f..b7bebb292f37 100644 --- a/drivers/pinctrl/freescale/pinctrl-imx7ulp.c +++ b/drivers/pinctrl/freescale/pinctrl-imx7ulp.c @@ -259,6 +259,8 @@ static const struct pinctrl_pin_desc imx7ulp_pinctrl_pads[] = { IMX_PINCTRL_PIN(IMX7ULP_PAD_PTF19), }; +#define BM_OBE_ENABLED BIT(17) +#define BM_IBE_ENABLED BIT(16) #define BM_LK_ENABLED BIT(15) #define BM_MUX_MODE 0xf00 #define BP_MUX_MODE 8 @@ -300,10 +302,34 @@ static void imx7ulp_cfg_params_fixup(unsigned long *configs, } } +static int imx7ulp_pmx_gpio_set_direction(struct pinctrl_dev *pctldev, + struct pinctrl_gpio_range *range, + unsigned offset, bool input) +{ + struct imx_pinctrl *ipctl = pinctrl_dev_get_drvdata(pctldev); + struct imx_pinctrl_soc_info *info = ipctl->info; + const struct imx_pin_reg *pin_reg; + u32 reg; + + pin_reg = &info->pin_regs[offset]; + if (pin_reg->mux_reg == -1) + return -EINVAL; + + reg = readl(ipctl->base + pin_reg->mux_reg); + if (input) + reg = (reg & ~BM_OBE_ENABLED) | BM_IBE_ENABLED; + else + reg = (reg & ~BM_IBE_ENABLED) | BM_OBE_ENABLED; + writel(reg, ipctl->base + pin_reg->mux_reg); + + return 0; +} + static struct imx_pinctrl_soc_info imx7ulp_pinctrl_info = { .pins = imx7ulp_pinctrl_pads, .npins = ARRAY_SIZE(imx7ulp_pinctrl_pads), .flags = ZERO_OFFSET_VALID | SHARE_MUX_CONF_REG, + .gpio_set_direction = imx7ulp_pmx_gpio_set_direction, .mux_mask = BM_MUX_MODE, .mux_shift = BP_MUX_MODE, .generic_pinconf = true, |