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| author |   Geert Uytterhoeven <geert+renesas@glider.be> | 2022-04-13 19:24:07 +0200 |
|---|---|---|
| committer | Geert Uytterhoeven <geert+renesas@glider.be> | 2022-05-05 12:02:28 +0200 |
| commit | 2a1b67b565bb34c88fda8dc65fa2b5a8e301cf97 (patch) | |
| tree | b510b6ee0c09921a34493ba04256eb1085ab4c2f /drivers/pinctrl | |
| parent | pinctrl: renesas: sh7723: Optimize fixed-width reserved fields (diff) | |
| download | wireguard-linux-2a1b67b565bb34c88fda8dc65fa2b5a8e301cf97.tar.xz wireguard-linux-2a1b67b565bb34c88fda8dc65fa2b5a8e301cf97.zip | |
pinctrl: renesas: sh7724: Optimize fixed-width reserved fields
Describe registers with fixed-width register fields and many reserved
fields using the PINMUX_CFG_REG_VAR() macro, as the latter supports a
shorthand not requiring dummy values.
This reduces kernel size by 8 bytes.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/696dcad42a8b8395276301eb5dd5c5a895826f35.1649865241.git.geert+renesas@glider.be
Diffstat (limited to 'drivers/pinctrl')
| -rw-r--r-- | drivers/pinctrl/renesas/pfc-sh7724.c | 7 |
1 files changed, 4 insertions, 3 deletions
diff --git a/drivers/pinctrl/renesas/pfc-sh7724.c b/drivers/pinctrl/renesas/pfc-sh7724.c index 551da3113ce3..26517ad26a0f 100644 --- a/drivers/pinctrl/renesas/pfc-sh7724.c +++ b/drivers/pinctrl/renesas/pfc-sh7724.c @@ -1798,9 +1798,10 @@ static const struct pinmux_cfg_reg pinmux_config_regs[] = { PTF1_FN, PTF1_OUT, 0, PTF1_IN, PTF0_FN, PTF0_OUT, 0, PTF0_IN )) }, - { PINMUX_CFG_REG("PGCR", 0xa405010c, 16, 2, GROUP( - 0, 0, 0, 0, - 0, 0, 0, 0, + { PINMUX_CFG_REG_VAR("PGCR", 0xa405010c, 16, + GROUP(-4, 2, 2, 2, 2, 2, 2), + GROUP( + /* RESERVED [4] */ PTG5_FN, PTG5_OUT, 0, 0, PTG4_FN, PTG4_OUT, 0, 0, PTG3_FN, PTG3_OUT, 0, 0, |