diff options
| author |   Andy Shevchenko <andriy.shevchenko@linux.intel.com> | 2019-12-11 19:32:54 +0200 |
|---|---|---|
| committer | Andy Shevchenko <andriy.shevchenko@linux.intel.com> | 2020-04-13 13:14:35 +0300 |
| commit | ccd025eaddaeb99e982029446197c544252108e2 (patch) | |
| tree | cbb817a6ff97b4e3586eb8895b08bddf6e44a294 /drivers/pinctrl | |
| parent | pinctrl: sunrisepoint: Fix PAD lock register offset for SPT-H (diff) | |
| download | wireguard-linux-ccd025eaddaeb99e982029446197c544252108e2.tar.xz wireguard-linux-ccd025eaddaeb99e982029446197c544252108e2.zip | |
pinctrl: baytrail: Enable pin configuration setting for GPIO chip
It appears that pin configuration for GPIO chip hasn't been enabled yet
due to absence of ->set_config() callback.
Enable it here for Intel Baytrail.
Fixes: c501d0b149de ("pinctrl: baytrail: Add pin control operations")
Depends-on: 2956b5d94a76 ("pinctrl / gpio: Introduce .set_config() callback for GPIO chips")
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Diffstat (limited to 'drivers/pinctrl')
| -rw-r--r-- | drivers/pinctrl/intel/pinctrl-baytrail.c | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/pinctrl/intel/pinctrl-baytrail.c b/drivers/pinctrl/intel/pinctrl-baytrail.c index b409642f168d..9b821c9cbd16 100644 --- a/drivers/pinctrl/intel/pinctrl-baytrail.c +++ b/drivers/pinctrl/intel/pinctrl-baytrail.c @@ -1286,6 +1286,7 @@ static const struct gpio_chip byt_gpio_chip = { .direction_output = byt_gpio_direction_output, .get = byt_gpio_get, .set = byt_gpio_set, + .set_config = gpiochip_generic_config, .dbg_show = byt_gpio_dbg_show, }; |