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| author |   Sibi Sankar <sibis@codeaurora.org> | 2020-07-16 17:35:14 +0530 |
|---|---|---|
| committer |   Bjorn Andersson <bjorn.andersson@linaro.org> | 2020-07-16 22:15:25 -0700 |
| commit | 4e6751a1cfab85b7a1c054cf3d55f12322e1ee3b (patch) | |
| tree | 21a57f71d7ec0ee994630f688167022d287a3487 /drivers/remoteproc | |
| parent | remoteproc: qcom: pil-info: Fix shift overflow (diff) | |
| download | wireguard-linux-4e6751a1cfab85b7a1c054cf3d55f12322e1ee3b.tar.xz wireguard-linux-4e6751a1cfab85b7a1c054cf3d55f12322e1ee3b.zip | |
remoteproc: qcom_q6v5_mss: Monitor MSS_STATUS for boot completion
On secure devices there exists a race condition which could lock the MSS
CONFIG AHB bus thus preventing access to BOOT_STATUS register during SSR.
Switch to polling the MSS_STATUS register with an additional 10 us delay
to reliably track boot completion.
Signed-off-by: Sibi Sankar <sibis@codeaurora.org>
Link: https://lore.kernel.org/r/20200716120514.21588-1-sibis@codeaurora.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Diffstat (limited to 'drivers/remoteproc')
| -rw-r--r-- | drivers/remoteproc/qcom_q6v5_mss.c | 12 |
1 files changed, 6 insertions, 6 deletions
diff --git a/drivers/remoteproc/qcom_q6v5_mss.c b/drivers/remoteproc/qcom_q6v5_mss.c index dd37e462ed61..1fd270a900f4 100644 --- a/drivers/remoteproc/qcom_q6v5_mss.c +++ b/drivers/remoteproc/qcom_q6v5_mss.c @@ -112,8 +112,6 @@ #define QDSP6SS_SLEEP 0x3C #define QDSP6SS_BOOT_CORE_START 0x400 #define QDSP6SS_BOOT_CMD 0x404 -#define QDSP6SS_BOOT_STATUS 0x408 -#define BOOT_STATUS_TIMEOUT_US 200 #define BOOT_FSM_TIMEOUT 10000 struct reg_info { @@ -579,13 +577,15 @@ static int q6v5proc_reset(struct q6v5 *qproc) /* De-assert the Q6 stop core signal */ writel(1, qproc->reg_base + QDSP6SS_BOOT_CORE_START); + /* Wait for 10 us for any staggering logic to settle */ + usleep_range(10, 20); + /* Trigger the boot FSM to start the Q6 out-of-reset sequence */ writel(1, qproc->reg_base + QDSP6SS_BOOT_CMD); - /* Poll the QDSP6SS_BOOT_STATUS for FSM completion */ - ret = readl_poll_timeout(qproc->reg_base + QDSP6SS_BOOT_STATUS, - val, (val & BIT(0)) != 0, 1, - BOOT_STATUS_TIMEOUT_US); + /* Poll the MSS_STATUS for FSM completion */ + ret = readl_poll_timeout(qproc->rmb_base + RMB_MBA_MSS_STATUS, + val, (val & BIT(0)) != 0, 10, BOOT_FSM_TIMEOUT); if (ret) { dev_err(qproc->dev, "Boot FSM failed to complete.\n"); /* Reset the modem so that boot FSM is in reset state */ |