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| author |   Gabriel Somlo <gsomlo@gmail.com> | 2021-05-26 06:51:26 -0400 |
|---|---|---|
| committer |   Stafford Horne <shorne@gmail.com> | 2021-06-11 04:35:40 +0900 |
| commit | ad4e600cbf897f47525b342cd4b02e88ed300a83 (patch) | |
| tree | 70ccb051e4d94c05d64690be0a498aea6afbd306 /drivers/soc/litex | |
| parent | Linux 5.13-rc5 (diff) | |
| download | wireguard-linux-ad4e600cbf897f47525b342cd4b02e88ed300a83.tar.xz wireguard-linux-ad4e600cbf897f47525b342cd4b02e88ed300a83.zip | |
drivers/soc/litex: remove 8-bit subregister option
Since upstream LiteX recommends that Linux support be limited to
designs configured with 32-bit CSR subregisters (see commit a2b71fde
in upstream LiteX, https://github.com/enjoy-digital/litex), remove
the option to select 8-bit subregisters, significantly reducing the
complexity of LiteX CSR (MMIO register) accessor methods.
NOTE: for details on the underlying mechanics of LiteX CSR registers,
see https://github.com/enjoy-digital/litex/wiki/CSR-Bus or the original
LiteX accessors (litex/soc/software/include/hw/common.h in the upstream
repository).
Signed-off-by: Gabriel Somlo <gsomlo@gmail.com>
Cc: Stafford Horne <shorne@gmail.com>
Cc: Florent Kermarrec <florent@enjoy-digital.fr>
Cc: Mateusz Holenko <mholenko@antmicro.com>
Cc: Joel Stanley <joel@jms.id.au>
Reviewed-by: Joel Stanley <joel@jms.id.au>
Signed-off-by: Stafford Horne <shorne@gmail.com>
Diffstat (limited to 'drivers/soc/litex')
| -rw-r--r-- | drivers/soc/litex/Kconfig | 12 | ||||
| -rw-r--r-- | drivers/soc/litex/litex_soc_ctrl.c | 3 |
2 files changed, 1 insertions, 14 deletions
diff --git a/drivers/soc/litex/Kconfig b/drivers/soc/litex/Kconfig index e7011d665b15..e6ba3573a772 100644 --- a/drivers/soc/litex/Kconfig +++ b/drivers/soc/litex/Kconfig @@ -17,16 +17,4 @@ config LITEX_SOC_CONTROLLER All drivers that use functions from litex.h must depend on LITEX. -config LITEX_SUBREG_SIZE - int "Size of a LiteX CSR subregister, in bytes" - depends on LITEX - range 1 4 - default 4 - help - LiteX MMIO registers (referred to as Configuration and Status - registers, or CSRs) are spread across adjacent 8- or 32-bit - subregisters, located at 32-bit aligned MMIO addresses. Use - this to select the appropriate size (1 or 4 bytes) matching - your particular LiteX build. - endmenu diff --git a/drivers/soc/litex/litex_soc_ctrl.c b/drivers/soc/litex/litex_soc_ctrl.c index c3e379a990f2..f75790091d38 100644 --- a/drivers/soc/litex/litex_soc_ctrl.c +++ b/drivers/soc/litex/litex_soc_ctrl.c @@ -62,8 +62,7 @@ static int litex_check_csr_access(void __iomem *reg_addr) /* restore original value of the SCRATCH register */ litex_write32(reg_addr + SCRATCH_REG_OFF, SCRATCH_REG_VALUE); - pr_info("LiteX SoC Controller driver initialized: subreg:%d, align:%d", - LITEX_SUBREG_SIZE, LITEX_SUBREG_ALIGN); + pr_info("LiteX SoC Controller driver initialized"); return 0; } |