diff options
| author |   Dmitry Osipenko <digetx@gmail.com> | 2019-12-18 21:23:02 +0300 |
|---|---|---|
| committer |   Thierry Reding <treding@nvidia.com> | 2020-01-10 15:58:48 +0100 |
| commit | c71f213fa5afae40cc7e5365585f5cdc51b135df (patch) | |
| tree | 9a227e90da69244b92c680942e2dd81884cf412d /drivers/soc | |
| parent | soc/tegra: fuse: Cache values of straps and Chip ID registers (diff) | |
| download | wireguard-linux-c71f213fa5afae40cc7e5365585f5cdc51b135df.tar.xz wireguard-linux-c71f213fa5afae40cc7e5365585f5cdc51b135df.zip | |
soc/tegra: fuse: Warn if straps are not ready
Now both Chip ID and HW straps are becoming available at the same time,
thus we could simply check the availability of the ID in order to check
the availability of the straps. We couldn't check straps for 0x0 because
it could be a correct value.
This change didn't uncover any problems, but anyways it is nicer to have
straps verified for consistency with the Chip ID verification.
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Diffstat (limited to 'drivers/soc')
| -rw-r--r-- | drivers/soc/tegra/fuse/tegra-apbmisc.c | 4 |
1 files changed, 3 insertions, 1 deletions
diff --git a/drivers/soc/tegra/fuse/tegra-apbmisc.c b/drivers/soc/tegra/fuse/tegra-apbmisc.c index 984f42c80112..3a787a30c3b1 100644 --- a/drivers/soc/tegra/fuse/tegra-apbmisc.c +++ b/drivers/soc/tegra/fuse/tegra-apbmisc.c @@ -27,7 +27,7 @@ static u32 chipid; u32 tegra_read_chipid(void) { - WARN(!chipid, "Tegra Chip ID not yet available\n"); + WARN(!chipid, "Tegra ABP MISC not yet available\n"); return chipid; } @@ -39,6 +39,8 @@ u8 tegra_get_chip_id(void) u32 tegra_read_straps(void) { + WARN(!chipid, "Tegra ABP MISC not yet available\n"); + return strapping; } |