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authorzhengbin <zhengbin13@huawei.com>2019-10-08 15:41:52 +0800
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>2019-10-08 14:52:56 +0200
commit3740b6351509d19d44ba39e47f6a76aa68799586 (patch)
treebcb98da96329f6f14ffd48a6b49765ff4c854dc7 /drivers/staging/sm750fb
parentstaging: sm750fb: Remove set but not used variable 'uiActualPixelClk' (diff)
downloadwireguard-linux-3740b6351509d19d44ba39e47f6a76aa68799586.tar.xz
wireguard-linux-3740b6351509d19d44ba39e47f6a76aa68799586.zip
staging: sm750fb: Remove set but not used variable 'actual_mx_clk'
Fixes gcc '-Wunused-but-set-variable' warning: drivers/staging/sm750fb/ddk750_chip.c: In function set_chip_clock: drivers/staging/sm750fb/ddk750_chip.c:59:15: warning: variable actual_mx_clk set but not used [-Wunused-but-set-variable] It is not used since commit f0977109a577 ("staging: sm750fb: lower case to fix camelcase checkpatch warning") Reported-by: Hulk Robot <hulkci@huawei.com> Signed-off-by: zhengbin <zhengbin13@huawei.com> Reviewed-by: Dan Carpenter <dan.carpenter@oracle.com> Link: https://lore.kernel.org/r/1570520515-2186-4-git-send-email-zhengbin13@huawei.com Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Diffstat (limited to 'drivers/staging/sm750fb')
-rw-r--r--drivers/staging/sm750fb/ddk750_chip.c3
1 files changed, 1 insertions, 2 deletions
diff --git a/drivers/staging/sm750fb/ddk750_chip.c b/drivers/staging/sm750fb/ddk750_chip.c
index e598881308d7..02860d3ec365 100644
--- a/drivers/staging/sm750fb/ddk750_chip.c
+++ b/drivers/staging/sm750fb/ddk750_chip.c
@@ -56,7 +56,6 @@ static unsigned int get_mxclk_freq(void)
static void set_chip_clock(unsigned int frequency)
{
struct pll_value pll;
- unsigned int actual_mx_clk;
/* Cheok_0509: For SM750LE, the chip clock is fixed. Nothing to set. */
if (sm750_get_chip_type() == SM750LE)
@@ -76,7 +75,7 @@ static void set_chip_clock(unsigned int frequency)
* Return value of sm750_calc_pll_value gives the actual
* possible clock.
*/
- actual_mx_clk = sm750_calc_pll_value(frequency, &pll);
+ sm750_calc_pll_value(frequency, &pll);
/* Master Clock Control: MXCLK_PLL */
poke32(MXCLK_PLL_CTRL, sm750_format_pll_reg(&pll));