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authorAyush Sawal <ayush.sawal@chelsio.com>2019-12-13 17:08:52 +0530
committerHerbert Xu <herbert@gondor.apana.org.au>2019-12-20 14:58:35 +0800
commit27896aff15d66c241a87402bea81dc03c9fb80bd (patch)
treeec0e8dfb0f962e972637a819ac1a43ff758f4c7d /drivers
parentcrypto: atmel-{aes,tdes} - Update the IV only when the op succeeds (diff)
downloadwireguard-linux-27896aff15d66c241a87402bea81dc03c9fb80bd.tar.xz
wireguard-linux-27896aff15d66c241a87402bea81dc03c9fb80bd.zip
crypto: chelsio - calculating tx_channel_id as per the max number of channels
chcr driver was not using the number of channels from lld and assuming that there are always two channels available. With following patch chcr will use number of channel as passed by cxgb4. Signed-off-by: Ayush Sawal <ayush.sawal@chelsio.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
Diffstat (limited to 'drivers')
-rw-r--r--drivers/crypto/chelsio/chcr_algo.c3
1 files changed, 2 insertions, 1 deletions
diff --git a/drivers/crypto/chelsio/chcr_algo.c b/drivers/crypto/chelsio/chcr_algo.c
index 1b4a5664e604..586dbc69d0cd 100644
--- a/drivers/crypto/chelsio/chcr_algo.c
+++ b/drivers/crypto/chelsio/chcr_algo.c
@@ -1379,7 +1379,8 @@ static int chcr_device_init(struct chcr_context *ctx)
txq_perchan = ntxq / u_ctx->lldi.nchan;
spin_lock(&ctx->dev->lock_chcr_dev);
ctx->tx_chan_id = ctx->dev->tx_channel_id;
- ctx->dev->tx_channel_id = !ctx->dev->tx_channel_id;
+ ctx->dev->tx_channel_id =
+ (ctx->dev->tx_channel_id + 1) % u_ctx->lldi.nchan;
spin_unlock(&ctx->dev->lock_chcr_dev);
rxq_idx = ctx->tx_chan_id * rxq_perchan;
rxq_idx += id % rxq_perchan;