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| author |   Zenghui Yu <yuzenghui@huawei.com> | 2020-02-06 15:57:06 +0800 |
|---|---|---|
| committer |   Marc Zyngier <maz@kernel.org> | 2020-02-08 10:01:33 +0000 |
| commit | e88bd316e5971fe78884ad1f466b9fc576575e5f (patch) | |
| tree | 35c43373fcc365e4045914cd88f9bcfa45a1ae01 /drivers | |
| parent | irqchip/gic-v3-its: Reference to its_invall_cmd descriptor when building INVALL (diff) | |
| download | wireguard-linux-e88bd316e5971fe78884ad1f466b9fc576575e5f.tar.xz wireguard-linux-e88bd316e5971fe78884ad1f466b9fc576575e5f.zip | |
irqchip/gic-v4.1: Fix programming of GICR_VPROPBASER_4_1_SIZE
The Size field of GICv4.1 VPROPBASER register indicates number of
pages minus one and together Page_Size and Size control the vPEID
width. Let's respect this requirement of the architecture.
Signed-off-by: Zenghui Yu <yuzenghui@huawei.com>
Signed-off-by: Marc Zyngier <maz@kernel.org>
Link: https://lore.kernel.org/r/20200206075711.1275-2-yuzenghui@huawei.com
Diffstat (limited to 'drivers')
| -rw-r--r-- | drivers/irqchip/irq-gic-v3-its.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/irqchip/irq-gic-v3-its.c b/drivers/irqchip/irq-gic-v3-its.c index e5a25d97f8db..992bc72cab6f 100644 --- a/drivers/irqchip/irq-gic-v3-its.c +++ b/drivers/irqchip/irq-gic-v3-its.c @@ -2531,7 +2531,7 @@ static int allocate_vpe_l1_table(void) npg = 1; } - val |= FIELD_PREP(GICR_VPROPBASER_4_1_SIZE, npg); + val |= FIELD_PREP(GICR_VPROPBASER_4_1_SIZE, npg - 1); /* Right, that's the number of CPU pages we need for L1 */ np = DIV_ROUND_UP(npg * psz, PAGE_SIZE); |