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| author |   Yinghai Lu <yhlu.kernel@gmail.com> | 2008-10-04 14:50:32 -0700 |
|---|---|---|
| committer |   H. Peter Anvin <hpa@zytor.com> | 2008-10-04 20:09:14 -0700 |
| commit | 99e1aa17ce434010dd820b583628370cc15f10f3 (patch) | |
| tree | f856dd2dd02d6986f590eb47b2fe3cf814807b57 /fs/jbd2/commit.c | |
| parent | x86: mtrr_cleanup: print out correct type v2 (diff) | |
| download | wireguard-linux-99e1aa17ce434010dd820b583628370cc15f10f3.tar.xz wireguard-linux-99e1aa17ce434010dd820b583628370cc15f10f3.zip | |
x86: mtrr_cleanup: first 1M may be covered in var mtrrs
The first 1M is don't care when it comes to the variables MTRRs.
Cover it as WB as a heuristic approximation; this is generally what we
want to minimize the number of registers.
Signed-off-by: Yinghai Lu <yhlu.kernel@gmail.com>
Signed-off-by: H. Peter Anvin <hpa@zytor.com>
Diffstat (limited to 'fs/jbd2/commit.c')
0 files changed, 0 insertions, 0 deletions