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authorStephen Warren <swarren@nvidia.com>2012-04-13 16:35:20 -0600
committerStephen Warren <swarren@nvidia.com>2012-04-25 15:22:10 -0600
commit563da21b1d1878736905bbff0f096fcd960d57c5 (patch)
treea73429c7eaf743341033b7fbd0c1011259797ddd /fs/nfs/proc.c
parentARM: tegra: add USB ULPI PHY reset GPIO to device tree (diff)
downloadwireguard-linux-563da21b1d1878736905bbff0f096fcd960d57c5.tar.xz
wireguard-linux-563da21b1d1878736905bbff0f096fcd960d57c5.zip
ARM: dt: tegra: pinmux changes for USB ULPI
Ensure that the USB ULPI signals are not tri-stated, and have no pull- up or pull-down. Ensure that the pingroup hosting the USB ULPI reset signal (GPIO PV0 or PV1 depending on the board, so UAC) is not tri-stated, and has no pull- up or pull-down. This change appears larger than it is due to the grouping and sorting of the pin configuration data. Signed-off-by: Stephen Warren <swarren@nvidia.com>
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