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authorDave Jiang <dave.jiang@intel.com>2023-10-01 07:35:29 -0700
committerRafael J. Wysocki <rafael.j.wysocki@intel.com>2023-10-03 16:04:22 +0200
commit178e1ea6a68f12967ee0e9afc4d79a2939acd43c (patch)
tree0092aaf09cdce78d4e27f0f392e0679a209266b3 /include/acpi/actbl1.h
parentLinux 6.6-rc4 (diff)
downloadwireguard-linux-178e1ea6a68f12967ee0e9afc4d79a2939acd43c.tar.xz
wireguard-linux-178e1ea6a68f12967ee0e9afc4d79a2939acd43c.zip
ACPICA: Add defines for CDAT SSLBIS
Add upstream port and any port definition for SSLBIS. Link: https://github.com/acpica/acpica/pull/898 Reviewed-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> Signed-off-by: Dave Jiang <dave.jiang@intel.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
Diffstat (limited to 'include/acpi/actbl1.h')
-rw-r--r--include/acpi/actbl1.h3
1 files changed, 3 insertions, 0 deletions
diff --git a/include/acpi/actbl1.h b/include/acpi/actbl1.h
index 8d5572ad48cb..a33375e055ad 100644
--- a/include/acpi/actbl1.h
+++ b/include/acpi/actbl1.h
@@ -465,6 +465,9 @@ struct acpi_cdat_sslbe {
u16 reserved;
};
+#define ACPI_CDAT_SSLBIS_US_PORT 0x0100
+#define ACPI_CDAT_SSLBIS_ANY_PORT 0xffff
+
/*******************************************************************************
*
* CEDT - CXL Early Discovery Table