diff options
| author |   Likun Gao <Likun.Gao@amd.com> | 2019-03-18 21:15:25 +0800 |
|---|---|---|
| committer |   Alex Deucher <alexander.deucher@amd.com> | 2020-06-03 13:51:56 -0400 |
| commit | ccaf72d3c252a647e7bdd944d1d4fd0aa9adfe9e (patch) | |
| tree | fdb67ef8326bd49866fc69aa6e6ad83e0a78ed40 /include/drm/amd_asic_type.h | |
| parent | drm/amd/display: Add dcn30 Headers (v2) (diff) | |
| download | wireguard-linux-ccaf72d3c252a647e7bdd944d1d4fd0aa9adfe9e.tar.xz wireguard-linux-ccaf72d3c252a647e7bdd944d1d4fd0aa9adfe9e.zip | |
drm/amdgpu: add sienna_cichlid asic type
Signed-off-by: Likun Gao <Likun.Gao@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'include/drm/amd_asic_type.h')
| -rw-r--r-- | include/drm/amd_asic_type.h | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/include/drm/amd_asic_type.h b/include/drm/amd_asic_type.h index b1230e33d506..0c5bd1134460 100644 --- a/include/drm/amd_asic_type.h +++ b/include/drm/amd_asic_type.h @@ -54,6 +54,7 @@ enum amd_asic_type { CHIP_NAVI10, /* 25 */ CHIP_NAVI14, /* 26 */ CHIP_NAVI12, /* 27 */ + CHIP_SIENNA_CICHLID, /* 28 */ CHIP_LAST, }; |