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authorThierry Reding <treding@nvidia.com>2014-08-05 11:20:25 +0200
committerThierry Reding <treding@nvidia.com>2014-11-13 13:56:10 +0100
commit3b46d4a0def157e77000e252bf5caae7d3defe1b (patch)
treeac24dade46621c6dc0b9adeb65fef358fd7b0e34 /include/drm/drm_mipi_dsi.h
parentdrm/dsi: Implement DCS {get,set}_pixel_format commands (diff)
downloadwireguard-linux-3b46d4a0def157e77000e252bf5caae7d3defe1b.tar.xz
wireguard-linux-3b46d4a0def157e77000e252bf5caae7d3defe1b.zip
drm/dsi: Implement DCS set_{column,page}_address commands
Provide small convenience wrappers to set the column and page extents of the frame memory accessed by the host processors. Reviewed-by: Sean Paul <seanpaul@chromium.org> Signed-off-by: Thierry Reding <treding@nvidia.com>
Diffstat (limited to 'include/drm/drm_mipi_dsi.h')
-rw-r--r--include/drm/drm_mipi_dsi.h4
1 files changed, 4 insertions, 0 deletions
diff --git a/include/drm/drm_mipi_dsi.h b/include/drm/drm_mipi_dsi.h
index 79927f2d4b6c..061a792daf7d 100644
--- a/include/drm/drm_mipi_dsi.h
+++ b/include/drm/drm_mipi_dsi.h
@@ -205,6 +205,10 @@ int mipi_dsi_dcs_enter_sleep_mode(struct mipi_dsi_device *dsi);
int mipi_dsi_dcs_exit_sleep_mode(struct mipi_dsi_device *dsi);
int mipi_dsi_dcs_set_display_off(struct mipi_dsi_device *dsi);
int mipi_dsi_dcs_set_display_on(struct mipi_dsi_device *dsi);
+int mipi_dsi_dcs_set_column_address(struct mipi_dsi_device *dsi, u16 start,
+ u16 end);
+int mipi_dsi_dcs_set_page_address(struct mipi_dsi_device *dsi, u16 start,
+ u16 end);
int mipi_dsi_dcs_set_tear_off(struct mipi_dsi_device *dsi);
int mipi_dsi_dcs_set_tear_on(struct mipi_dsi_device *dsi,
enum mipi_dsi_dcs_tear_mode mode);