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| author |   Jonathan Gray <jsg@jsg.id.au> | 2023-02-06 15:37:27 +1100 |
|---|---|---|
| committer |   José Roberto de Souza <jose.souza@intel.com> | 2023-02-06 05:58:37 -0800 |
| commit | 54762e920eb483bd70aa92421788bc4e87e4fd1d (patch) | |
| tree | cfeceae3dca5c3149bd85afe3eef0093278ebe9c /include/drm/i915_pciids.h | |
| parent | drm/i915/hwmon: Enable PL1 power limit (diff) | |
| download | wireguard-linux-54762e920eb483bd70aa92421788bc4e87e4fd1d.tar.xz wireguard-linux-54762e920eb483bd70aa92421788bc4e87e4fd1d.zip | |
drm/i915: Add another EHL pci id
described as "32 Execution Unit (EU) Super SKU" in:
Intel Atom x6000E Series, and Intel Pentium and Celeron N and
J Series Processors for IoT Applications
Datasheet, Volume 1
Document Number: 636112-1.6
Signed-off-by: Jonathan Gray <jsg@jsg.id.au>
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20230206043727.46069-1-jsg@jsg.id.au
Diffstat (limited to 'include/drm/i915_pciids.h')
| -rw-r--r-- | include/drm/i915_pciids.h | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/include/drm/i915_pciids.h b/include/drm/i915_pciids.h index 4a4c190f7698..92205054e542 100644 --- a/include/drm/i915_pciids.h +++ b/include/drm/i915_pciids.h @@ -588,6 +588,7 @@ INTEL_VGA_DEVICE(0x4551, info), \ INTEL_VGA_DEVICE(0x4555, info), \ INTEL_VGA_DEVICE(0x4557, info), \ + INTEL_VGA_DEVICE(0x4570, info), \ INTEL_VGA_DEVICE(0x4571, info) /* JSL */ |