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| author |   Rodrigo Vivi <rodrigo.vivi@intel.com> | 2017-06-06 13:30:32 -0700 |
|---|---|---|
| committer | Rodrigo Vivi <rodrigo.vivi@intel.com> | 2017-06-07 07:28:26 -0700 |
| commit | e918d79a5d0a1b431e2cac0e6e6ac9452fd9ab32 (patch) | |
| tree | 89f830f776391df6c1750f4d21bf442db89e9065 /include/drm/i915_pciids.h | |
| parent | drm/i915/cnl: Cannonlake uses CNP PCH. (diff) | |
| download | wireguard-linux-e918d79a5d0a1b431e2cac0e6e6ac9452fd9ab32.tar.xz wireguard-linux-e918d79a5d0a1b431e2cac0e6e6ac9452fd9ab32.zip | |
drm/i915/cnl: Add Cannonlake PCI IDs for U-skus.
Platform enabling and its power-on are organized in different
skus (U x Y x S x H, etc). So instead of organizing it in
GT1 x GT2 x GT3 let's also use the platform sku.
This is also the new Spec style what makes the review much
more easy and straightforward.
v2: Really include the PCI IDs to the picidlist[];
v3: Remove PCI IDs not present in spec.
v4: Rebase.
Signed-off-by: Anusha Srivatsa <anusha.srivatsa@intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Reviewed-by: Clinton Taylor <clinton.a.taylor@intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/1496781040-20888-3-git-send-email-rodrigo.vivi@intel.com
Diffstat (limited to 'include/drm/i915_pciids.h')
| -rw-r--r-- | include/drm/i915_pciids.h | 10 |
1 files changed, 10 insertions, 0 deletions
diff --git a/include/drm/i915_pciids.h b/include/drm/i915_pciids.h index 27e0dbaa6c0e..7f1bb3b0ce5b 100644 --- a/include/drm/i915_pciids.h +++ b/include/drm/i915_pciids.h @@ -334,4 +334,14 @@ INTEL_KBL_GT3_IDS(info), \ INTEL_KBL_GT4_IDS(info) +/* CNL U 2+2 */ +#define INTEL_CNL_U_GT2_IDS(info) \ + INTEL_VGA_DEVICE(0x5A52, info), \ + INTEL_VGA_DEVICE(0x5A5A, info), \ + INTEL_VGA_DEVICE(0x5A42, info), \ + INTEL_VGA_DEVICE(0x5A4A, info) + +#define INTEL_CNL_IDS(info) \ + INTEL_CNL_U_GT2_IDS(info) + #endif /* _I915_PCIIDS_H */ |