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| author |   Peter Ujfalusi <peter.ujfalusi@ti.com> | 2014-05-07 13:20:45 +0300 |
|---|---|---|
| committer |   Tero Kristo <t-kristo@ti.com> | 2014-05-28 13:06:50 +0300 |
| commit | 0cccd9190009aa6c037aa88a85f2a1b72a6a7963 (patch) | |
| tree | d731b24917b2438be1815c98fce58ddc20919de8 /include/dt-bindings/clk | |
| parent | CLK: TI: gate: add composite interface clock to OMAP2 only build (diff) | |
| download | wireguard-linux-0cccd9190009aa6c037aa88a85f2a1b72a6a7963.tar.xz wireguard-linux-0cccd9190009aa6c037aa88a85f2a1b72a6a7963.zip | |
ARM: dts: dra7xx-clocks: Correct name for atl clkin3 clock
To allign the name with the other atl clock names:
atlclkin3_ck -> atl_clkin3_ck
Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: Tero Kristo <t-kristo@ti.com>
Diffstat (limited to 'include/dt-bindings/clk')
0 files changed, 0 insertions, 0 deletions