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| author |   Vasily Khoruzhick <anarsoul@gmail.com> | 2020-01-03 22:35:04 -0800 |
|---|---|---|
| committer |   Maxime Ripard <maxime@cerno.tech> | 2020-01-04 09:18:08 +0100 |
| commit | a9b5c6717837840adc5d58ab75f232905a3af9f7 (patch) | |
| tree | a663f0bacf50df0b4f7dcf953da63a2a6e163cff /include/dt-bindings/clock | |
| parent | clk: sunxi-ng: add mux and pll notifiers for A64 CPU clock (diff) | |
| download | wireguard-linux-a9b5c6717837840adc5d58ab75f232905a3af9f7.tar.xz wireguard-linux-a9b5c6717837840adc5d58ab75f232905a3af9f7.zip | |
clk: sunxi-ng: a64: export CLK_CPUX clock for DVFS
Export CLK_CPUX so we can reference it in CPU node.
Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com>
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
Diffstat (limited to 'include/dt-bindings/clock')
| -rw-r--r-- | include/dt-bindings/clock/sun50i-a64-ccu.h | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/include/dt-bindings/clock/sun50i-a64-ccu.h b/include/dt-bindings/clock/sun50i-a64-ccu.h index a8ac4cfcdcbc..e512a1c9b0fc 100644 --- a/include/dt-bindings/clock/sun50i-a64-ccu.h +++ b/include/dt-bindings/clock/sun50i-a64-ccu.h @@ -46,6 +46,7 @@ #define CLK_PLL_VIDEO0 7 #define CLK_PLL_PERIPH0 11 +#define CLK_CPUX 21 #define CLK_BUS_MIPI_DSI 28 #define CLK_BUS_CE 29 #define CLK_BUS_DMA 30 |