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| author |   Jernej Skrabec <jernej.skrabec@siol.net> | 2018-11-04 19:26:42 +0100 |
|---|---|---|
| committer |   Maxime Ripard <maxime.ripard@bootlin.com> | 2018-11-05 10:22:02 +0100 |
| commit | b9f9e9b8e42cae6de92617a6c45740e4e6eb6f7f (patch) | |
| tree | c8cbd5437ad763bf2fd7a8efe1bc83052bec7627 /include/dt-bindings/clock | |
| parent | clk: sunxi-ng: h6: Set video PLLs limits (diff) | |
| download | wireguard-linux-b9f9e9b8e42cae6de92617a6c45740e4e6eb6f7f.tar.xz wireguard-linux-b9f9e9b8e42cae6de92617a6c45740e4e6eb6f7f.zip | |
dt-bindings: clock: sun8i-de2: Add H6 DE3 clock description
This commit adds necessary description and dt includes for H6 DE3 clock.
It is very similar to others, but memory region has some additional
registers not found in DE2.
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net>
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
Diffstat (limited to 'include/dt-bindings/clock')
| -rw-r--r-- | include/dt-bindings/clock/sun8i-de2.h | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/include/dt-bindings/clock/sun8i-de2.h b/include/dt-bindings/clock/sun8i-de2.h index 3bed63b524aa..7768f73b051e 100644 --- a/include/dt-bindings/clock/sun8i-de2.h +++ b/include/dt-bindings/clock/sun8i-de2.h @@ -15,4 +15,7 @@ #define CLK_MIXER1 7 #define CLK_WB 8 +#define CLK_BUS_ROT 9 +#define CLK_ROT 10 + #endif /* _DT_BINDINGS_CLOCK_SUN8I_DE2_H_ */ |