diff options
| author |   Peng Fan <peng.fan@nxp.com> | 2020-02-19 18:17:06 +0800 |
|---|---|---|
| committer |   Shawn Guo <shawnguo@kernel.org> | 2020-02-24 15:39:56 +0800 |
| commit | d6fb02f054127c23b048f4753176c57f3e440e79 (patch) | |
| tree | e36d087d5ef9bbff3622da45b64896c1dfd557e1 /include/dt-bindings/clock | |
| parent | clk: imx8mp: Rename the IMX8MP_CLK_HDMI_27M clock (diff) | |
| download | wireguard-linux-d6fb02f054127c23b048f4753176c57f3e440e79.tar.xz wireguard-linux-d6fb02f054127c23b048f4753176c57f3e440e79.zip | |
clk: imx: imx8mq: fix a53 cpu clock
The A53 CCM clk root only accepts input up to 1GHz, CCM A53 root
signoff timing is 1Ghz, however the A53 core which sources from CCM
root could run above 1GHz which violates the CCM.
There is a CORE_SEL slice before A53 core, we need to configure the
CORE_SEL slice source from ARM PLL, not A53 CCM clk root.
The A53 CCM clk root should only be used when need to change ARM PLL
frequency.
Add arm_a53_core clk that could source from arm_a53_div and arm_pll_out.
Configure a53 ccm root sources from 800MHz sys pll
Configure a53 core sources from arm_pll_out
Mark arm_a53_core as critical clock
Fixes: db27e40b27f1 ("clk: imx8mq: Add the missing ARM clock")
Reviewed-by: Jacky Bai <ping.bai@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Diffstat (limited to 'include/dt-bindings/clock')
| -rw-r--r-- | include/dt-bindings/clock/imx8mq-clock.h | 4 |
1 files changed, 3 insertions, 1 deletions
diff --git a/include/dt-bindings/clock/imx8mq-clock.h b/include/dt-bindings/clock/imx8mq-clock.h index 2b88723310bd..9b8045d75b8b 100644 --- a/include/dt-bindings/clock/imx8mq-clock.h +++ b/include/dt-bindings/clock/imx8mq-clock.h @@ -429,6 +429,8 @@ #define IMX8MQ_CLK_M4_CORE 287 #define IMX8MQ_CLK_VPU_CORE 288 -#define IMX8MQ_CLK_END 289 +#define IMX8MQ_CLK_A53_CORE 289 + +#define IMX8MQ_CLK_END 290 #endif /* __DT_BINDINGS_CLOCK_IMX8MQ_H */ |