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| author |   Enric Balletbo i Serra <enric.balletbo@collabora.com> | 2021-09-30 10:31:47 +0200 |
|---|---|---|
| committer |   Matthias Brugger <matthias.bgg@gmail.com> | 2021-10-08 15:11:13 +0200 |
| commit | 7fdb1bc3d96e9c8860dd434dd725cc94603744fa (patch) | |
| tree | a5a0a93b93a9716947de0c72e67fbaed80932653 /include/dt-bindings/reset | |
| parent | dt-bindings: display: mediatek: add dsi reset optional property (diff) | |
| download | wireguard-linux-7fdb1bc3d96e9c8860dd434dd725cc94603744fa.tar.xz wireguard-linux-7fdb1bc3d96e9c8860dd434dd725cc94603744fa.zip | |
arm64: dts: mt8173: Add the mmsys reset bit to reset the dsi0
Reset the DSI hardware is needed to prevent different settings between
the bootloader and the kernel.
Signed-off-by: Enric Balletbo i Serra <enric.balletbo@collabora.com>
Acked-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20210930103105.v4.4.I7bd7d9a8da5e2894711b700a1127e6902a2b2f1d@changeid
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
Diffstat (limited to 'include/dt-bindings/reset')
| -rw-r--r-- | include/dt-bindings/reset/mt8173-resets.h | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/include/dt-bindings/reset/mt8173-resets.h b/include/dt-bindings/reset/mt8173-resets.h index ba8636eda5ae..6a60c7cecc4c 100644 --- a/include/dt-bindings/reset/mt8173-resets.h +++ b/include/dt-bindings/reset/mt8173-resets.h @@ -27,6 +27,8 @@ #define MT8173_INFRA_GCE_FAXI_RST 40 #define MT8173_INFRA_MMIOMMURST 47 +/* MMSYS resets */ +#define MT8173_MMSYS_SW0_RST_B_DISP_DSI0 25 /* PERICFG resets */ #define MT8173_PERI_UART0_SW_RST 0 |