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authorMartin Blumenstingl <martin.blumenstingl@googlemail.com>2020-05-15 22:47:06 +0200
committerKevin Hilman <khilman@baylibre.com>2020-05-19 16:02:14 -0700
commit18dfc0bf8167fb0dc729da4a6a816e34d754318b (patch)
tree3f886ea793d63f0a43b40fcd2c65c3e83c6a3013 /include/dt-bindings
parentLinux 5.7-rc1 (diff)
downloadwireguard-linux-18dfc0bf8167fb0dc729da4a6a816e34d754318b.tar.xz
wireguard-linux-18dfc0bf8167fb0dc729da4a6a816e34d754318b.zip
dt-bindings: power: meson-ee-pwrc: add support for Meson8/8b/8m2
The power domains on the 32-bit Meson8/Meson8b/Meson8m2 SoCs are very similar to what G12A still uses. The (known) differences are: - Meson8 doesn't use any reset lines at all - Meson8b and Meson8m2 use the same reset lines, which are different from what the 64-bit SoCs use - there is no "vapb" clock on the older SoCs - amlogic,ao-sysctrl cannot point to the whole AO sysctrl region but only the power management related registers Add a new compatible string and adjust clock and reset line expectations for each SoC. Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com> Reviewed-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20200515204709.1505498-2-martin.blumenstingl@googlemail.com
Diffstat (limited to 'include/dt-bindings')
-rw-r--r--include/dt-bindings/power/meson8-power.h13
1 files changed, 13 insertions, 0 deletions
diff --git a/include/dt-bindings/power/meson8-power.h b/include/dt-bindings/power/meson8-power.h
new file mode 100644
index 000000000000..dd8b2ddb82a7
--- /dev/null
+++ b/include/dt-bindings/power/meson8-power.h
@@ -0,0 +1,13 @@
+/* SPDX-License-Identifier: (GPL-2.0+ or MIT) */
+/*
+ * Copyright (c) 2019 Martin Blumenstingl <martin.blumenstingl@googlemail.com>
+ */
+
+#ifndef _DT_BINDINGS_MESON8_POWER_H
+#define _DT_BINDINGS_MESON8_POWER_H
+
+#define PWRC_MESON8_VPU_ID 0
+#define PWRC_MESON8_ETHERNET_MEM_ID 1
+#define PWRC_MESON8_AUDIO_DSP_MEM_ID 2
+
+#endif /* _DT_BINDINGS_MESON8_POWER_H */