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| author |   周琰杰 (Zhou Yanjie) <zhouyanjie@wanyeetech.com> | 2020-07-01 00:38:52 +0800 |
|---|---|---|
| committer |   Stephen Boyd <sboyd@kernel.org> | 2020-07-27 18:18:14 -0700 |
| commit | 810797c14508dae3c80eacaa483a900b03fdb780 (patch) | |
| tree | 14b959b9b1adec1414d0608a95280af460bbbad2 /include/dt-bindings | |
| parent | clk: JZ4780: Reformat the code to align it. (diff) | |
| download | wireguard-linux-810797c14508dae3c80eacaa483a900b03fdb780.tar.xz wireguard-linux-810797c14508dae3c80eacaa483a900b03fdb780.zip | |
clk: X1000: Add support for calculat REFCLK of USB PHY.
Add functions for calculat the rate of REFCLK, which is needed by
USB PHY in Ingenic X1000 SoC.
Tested-by: 周正 (Zhou Zheng) <sernia.zhou@foxmail.com>
Signed-off-by: 周琰杰 (Zhou Yanjie) <zhouyanjie@wanyeetech.com>
Link: https://lore.kernel.org/r/20200630163852.47267-4-zhouyanjie@wanyeetech.com
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
Diffstat (limited to 'include/dt-bindings')
0 files changed, 0 insertions, 0 deletions