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authorDmitry Osipenko <digetx@gmail.com>2020-07-09 20:20:57 +0300
committerStephen Boyd <sboyd@kernel.org>2020-07-27 18:21:17 -0700
commitfa64023763cf1a3da8bf3341df6c2a47e54fcead (patch)
tree649cbb9cb4868faafe57ab0b0a78feb324462993 /include/dt-bindings
parentLinux 5.8-rc1 (diff)
downloadwireguard-linux-fa64023763cf1a3da8bf3341df6c2a47e54fcead.tar.xz
wireguard-linux-fa64023763cf1a3da8bf3341df6c2a47e54fcead.zip
clk: tegra: pll: Improve PLLM enable-state detection
Power Management Controller (PMC) can override the PLLM clock settings, including the enable-state. Although PMC could only act as a second level gate, meaning that PLLM needs to be enabled by the Clock and Reset Controller (CaR) anyways if we want it to be enabled. Hence, when PLLM is overridden by PMC, it needs to be enabled by CaR and ungated by PMC in order to be functional. Please note that this patch doesn't fix any known problem, and thus, it's merely a minor improvement. Link: https://lore.kernel.org/linux-arm-kernel/20191210120909.GA2703785@ulmo/T/ Signed-off-by: Dmitry Osipenko <digetx@gmail.com> Link: https://lore.kernel.org/r/20200709172057.13951-1-digetx@gmail.com Reviewed-by: Jon Hunter <jonathanh@nvidia.com> Tested-by: Jon Hunter <jonathanh@nvidia.com> Signed-off-by: Stephen Boyd <sboyd@kernel.org>
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